12 Commits

Author SHA1 Message Date
Xiang Li
a9c875b19a [NFC] [DirectX] Cleanup test for comput_ids.
Cleanup test for review in https://reviews.llvm.org/D127990
2022-07-07 14:02:32 -07:00
Chris Bieneman
e0b5208650 [NFC] [DirectX] Prefix for intrinsics should be dx
`dxil` is an architecture supported by the DirectX backend. These
intrinsics will likely be shared with other DirectX architectures like
`dxbc`. Using a common prefix `dx` will make it more intuitive.

Also the `dx` prefix is already set in the Triple, which causes
intrinsics described here to be unmatchable via the ClangBuiltin
mechanism.
2022-07-06 13:27:12 -05:00
Xiang Li
43dc319049 [DirectX] add thread/group id DXIL operations.
Add DXIL operation for thread/group id operations.

ID  Name	                     Description
93  ThreadId	                 reads the thread ID
94  GroupId	                  reads the group ID (SV_GroupID)
95  ThreadIdInGroup	          reads the thread ID within the group (SV_GroupThreadID)
96  FlattenedThreadIdInGroup	 provides a flattened index for a given thread within a given group (SV_GroupIndex)

Also add llvm intrinsic which map to these intrinsics to DXIL operation.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D127990
2022-07-01 10:56:07 -07:00
Chris Bieneman
2af61e620e [DirectX] Add DirectX target object writer
This is the last piece to bring together writing DXContainer files
containing DXIL through the DirectX backend.

While this change only has one test, all of the tests under
llvm/test/tools/dxil-dis also exercise this code. With this change the
output object file type for the dxil target is now DXContainer. Each of
the existing tests will generate DXContainer files, and the dxil-dis
tests additionally verify that the DXContainers generated are
well-formed and can be parsed by the DirectXShaderCompiler tools.

Depends on D127153 and D127165

Differential Revision: https://reviews.llvm.org/D127166
2022-06-17 21:33:08 -05:00
python3kgae
435897b41d [TableGen][DirectX] Add tableGen backend to generate DXIL operation for DirectX backend.
A new tableGen backend gen-dxil-enum is added to generate enum for DXIL operation and operation class.

A new file "DXILConstants.inc" will be generated when build DirectX target which include the enums.

More tableGen backends will be added to replace manually written table in DirectX backend.
The unused fields in dxil_inst will be used in future PR.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D125435
2022-06-14 17:31:58 -07:00
python3kgae
12ca031b0d [DirectX][Fail crash in DXILPrepareModule pass when input has typed ptr.
Check supportsTypedPointers instead of hasSetOpaquePointersValue when query if has typed ptr.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D127268
2022-06-07 21:11:24 -07:00
Chris Bieneman
d401a99306 [DirectX] Embed DXIL in LLVM Module
At the end of the codegen pipeline for DXIL we will emit the DXIL into
a global variable in the Module annotated for the "DXIL" section.

This will be used by the MCDXContainerStreamer to emit the DXIL into a
DXContainer DXIL part.

Other parts of the DXContainer will be constructed similarly by
serializing their values into GlobalVariables.

This will allow DXIL to flow into DXContainers through the normal
MCStreamer flow used in the MC layer.

Depends on D122270

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D125334
2022-06-06 15:04:26 -05:00
python3kgae
c6c13d4e5f [DirectX backend] When cleanup module flags only remove unused flags.
Only remove dx.valver from module flags when cleanup module flags in DXILTranslateMetadataPass.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D125842
2022-05-19 14:50:11 -07:00
python3kgae
0c7f7f1b01 [DirectX backend] Add pass to emit dxil metadata.
A new pass DxilEmitMetadata is added to translate information saved in llvm ir into metadata to match DXIL spec.

Only generate DXIL validator version in this PR.

In llvm ir, validator version is saved in ModuleFlag with "dx.valver" as Key.

  !llvm.module.flags = !{!0, !1}
  !1 = !{i32 6, !"dx.valver", !2}
  !2 = !{i32 1, i32 1}

DXIL validator version has major and minor versions that are specified as named metadata:

  !dx.valver = !{!2}
  !2 = !{i32 1, i32 7}

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D125158
2022-05-11 08:40:13 -07:00
Xiang Li
85285be9c3 [DirectX backend] Add pass to lower llvm intrinsic into dxil op function.
A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function.
Then translate call instructions on the intrinsic into call on dxil op function.
dxil op function will add i32 argument to the begining of args for dxil opcode.
So cannot use setCalledFunction to update the call instruction on intrinsic.

This commit only support sin to start the work.

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D124805
2022-05-11 00:03:05 -07:00
Chris Bieneman
f5d054cdc1 Modify DXILPrepare to emit no-op bitcasts
In supporting opaque pointers we need to re-materialize typed pointers
in bitcode emission. Because of how the value-enumerator pre-allocates
types and instructions we need to insert some no-op bitcasts in the
places that we'll need bitcasts for the pointer types.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D122269
2022-05-09 13:40:47 -05:00
Chris Bieneman
6599fdab2c Add DXILPrepare CodeGen pass
The DXIL Prepare pass handles the IR mutations required to convert
modern LLVM IR into something that more closely resembles LLVM-3.7 IR
so that the DXIL bitcode writer can emit 3.7 IR.

This change adds the codegen pass handling the first two IR
transformations:

* stripping new function attributes
* converting fneg into fsub

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D122081
2022-04-05 11:50:07 -05:00