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1419 Commits

Author SHA1 Message Date
Dan Gohman
1f3411de47 Don't create ISD::FNEG nodes after legalize if they aren't legal. 
Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of
redundant work in many cases, because in unsafe-fp-math mode,
ISD::FADD with a constant is considered free to negate, so the
DAGCombiner often negates x+0 to -0-x thinking it's free, when
in reality the end result is -x, which is more expensive than x.

Also, combine x*0 to 0.

This fixes PR3374.

llvm-svn: 62789
 2009-01-22 21:58:43 +00:00
Devang Patel
dec7fe2e71 Do not use buggy llvm-gcc to generate testcases. 
llvm-svn: 62770
 2009-01-22 18:28:11 +00:00
Bill Wendling
6cf1f8fd5b Now with RUN line. 
llvm-svn: 62716
 2009-01-21 21:28:03 +00:00
Bill Wendling
ba11cd338b Run this through -simplifycfg and -mem2reg to test only what we need to test. 
llvm-svn: 62714
 2009-01-21 21:02:27 +00:00
Dan Gohman
7e6b932f18 Simplify ReduceLoadWidth's logic: it doesn't need several different 
special cases after producing the new reduced-width load, because the
new load already has the needed adjustments built into it. This fixes
several bugs due to the special cases, including PR3317.

llvm-svn: 62692
 2009-01-21 15:17:51 +00:00
Dan Gohman
b43c8996f2 Fix a recent regression. ClrOpcode is not set for i8; for i8, if 
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.

llvm-svn: 62691
 2009-01-21 14:50:16 +00:00
Duncan Sands
1de451d0d0 Let's try to have our cake and eat it to: move 
this test into FrontendC to ensure that llvm-gcc
is available; assemble using "llvm-gcc -xassembler"
rather than "as".

llvm-svn: 62683
 2009-01-21 11:37:31 +00:00
Duncan Sands
696f4a8598 Don't rely on grep -w working. 
llvm-svn: 62682
 2009-01-21 09:41:42 +00:00
Scott Michel
ed7d79fce4 CellSPU: 
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
  cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
  Discovered interesting DAGCombiner feature, which is currently solved via
  custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
  insists on inserting one anyway.)
- Update README.

llvm-svn: 62664
 2009-01-21 04:58:48 +00:00
Evan Cheng
201501995f Favors generating "not" over "xor -1". For example. 
unsigned test(unsigned a) {
  return ~a;
}
llvm used to generate:
movl    $4294967295, %eax
xorl    4(%esp), %eax

Now it generates:
movl      4(%esp), %eax
notl      %eax

It's 3 bytes shorter.

llvm-svn: 62661
 2009-01-21 02:09:05 +00:00
Owen Anderson
be7a29de0b Be more aggressive about renumbering vregs after splitting them. 
llvm-svn: 62639
 2009-01-21 00:13:28 +00:00
Chris Lattner
f8a8c13c1e Don't bother running the assembler, we don't know that it will be configured 
for whatever llc defaults to.  This fixes PR3363

llvm-svn: 62619
 2009-01-20 21:41:53 +00:00
Evan Cheng
f1e873a221 Fix PR3243: a LiveVariables bug. When HandlePhysRegKill is checking whether the last reference is also the last def (i.e. dead def), it should also check if last reference is the current machine instruction being processed. This can happen when it is processing a physical register use and setting the current machine instruction as sub-register's last ref. 
llvm-svn: 62617
 2009-01-20 21:25:12 +00:00
Evan Cheng
4022b7c3f4 Add test case for PR3154. 
llvm-svn: 62604
 2009-01-20 19:29:54 +00:00
Bill Wendling
1d9c8e5522 Testcase for limited precision stuff. 
llvm-svn: 62572
 2009-01-20 06:23:59 +00:00
Dan Gohman
161b7b66ac Fix a dagcombine to not generate loads of non-round integer types, 
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.

llvm-svn: 62557
 2009-01-20 01:06:45 +00:00
Evan Cheng
8f79775a66 Make linear scan's trivial coalescer slightly more aggressive. 
llvm-svn: 62547
 2009-01-20 00:16:18 +00:00
Dale Johannesen
d067ecd1c7 Move & restructure test per review. 
llvm-svn: 62538
 2009-01-19 22:33:12 +00:00
Dan Gohman
cd0b1bf0a0 Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when 
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.

Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.

This fixes PR3018.

llvm-svn: 62533
 2009-01-19 21:44:21 +00:00
Dale Johannesen
740e98704d compile-time fmod was done incorrectly. PR 3316. 
llvm-svn: 62528
 2009-01-19 21:17:05 +00:00
Devang Patel
8c8aa2ac29 Verify Intrinsic::dbg_declare. 
llvm-svn: 62526
 2009-01-19 21:00:48 +00:00
Evan Cheng
44cc554311 DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it. 
llvm-svn: 62519
 2009-01-19 19:06:11 +00:00
Evan Cheng
7e9ef4d776 Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't 
optimize it to a SINT_TO_FP when the sign bit is known zero. X86 isel should perform the optimization itself.

llvm-svn: 62504
 2009-01-19 08:08:22 +00:00
Chris Lattner
64b7bd7f9e Fix rdar://6505632, an llc crash on 483.xalancbmk 
llvm-svn: 62470
 2009-01-18 20:35:00 +00:00
Bill Wendling
9880a2cb2f Testcase for last commit. 
llvm-svn: 62418
 2009-01-17 07:42:44 +00:00
Evan Cheng
bf38a5e540 Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode. 
llvm-svn: 62413
 2009-01-17 07:09:27 +00:00
Mon P Wang
ca6d6dea0b Simplify extract element of a scalar to vector. 
llvm-svn: 62383
 2009-01-17 00:07:25 +00:00
Evan Cheng
41e9f6a854 Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::LowerGlobalAddress to check if isVerifiedDebugInfoDesc() is true. Given the recent changes, it would falsely return true for a lot of GlobalAddressSDNode's. 
llvm-svn: 62373
 2009-01-16 22:57:32 +00:00
Dan Gohman
f1002495e3 Disable the post-RA scheduler on this test, since it uses a 
simple %prcontext which doesn't find what it's looking for
if the scheduler has rearranged the instructions.

llvm-svn: 62363
 2009-01-16 21:40:12 +00:00
Evan Cheng
968e2e7b3d CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions. 
llvm-svn: 62356
 2009-01-16 20:57:18 +00:00
Bill Wendling
e04334730e Add support for non-zero __builtin_return_address values on X86. 
llvm-svn: 62338
 2009-01-16 19:25:27 +00:00
Mon P Wang
e248edff1b Added missing support to widen an operand from a bit convert. 
llvm-svn: 62285
 2009-01-15 22:43:38 +00:00
Rafael Espindola
f2831d6cd1 Fix Alpha test and support for private linkage. 
llvm-svn: 62282
 2009-01-15 21:51:46 +00:00
Mon P Wang
ebfafee903 Expand insert/extract of a <4 x i32> with a variable index. 
llvm-svn: 62281
 2009-01-15 21:10:20 +00:00
Rafael Espindola
6de96a1b5d Add the private linkage. 
llvm-svn: 62279
 2009-01-15 20:18:42 +00:00
Richard Osborne
40119780a8 Don't fold address calculations which use negative offsets into 
the ADDRspii addressing mode.

llvm-svn: 62258
 2009-01-15 11:32:30 +00:00
Scott Michel
a292fc6d6b - Convert remaining i64 custom lowering into custom instruction emission 
sequences in SPUDAGToDAGISel.cpp and SPU64InstrInfo.td, killing custom
  DAG node types as needed.
- i64 mul is now a legal instruction, but emits an instruction sequence
  that stretches tblgen and the imagination, as well as violating laws of
  several small countries and most southern US states (just kidding, but
  looking at a function with 80+ parameters is really weird and just plain
  wrong.)
- Update tests as needed.

llvm-svn: 62254
 2009-01-15 04:41:47 +00:00
Richard Osborne
4359325ba8 Add pseudo instructions to the XCore for (load|store|load address) of a 
frame index. eliminateFrameIndex will replace these instructions with
(LDWSP|STWSP|LDAWSP) or (LDW|STW|LDAWF) if a frame pointer is in use.

This fixes PR 3324. Previously we used LDWSP, STWSP, LDAWSP before frame
pointer elimination. However since they were marked as implicitly using
SP they could not be rematerialised.

llvm-svn: 62238
 2009-01-14 18:26:46 +00:00
Dan Gohman
b8f5ba6781 Disable the register+memory forms of the bt instructions for now. Thanks 
to Eli for pointing out that these forms don't ignore the high bits of
their index operands, and as such are not immediately suitable for use
by isel.

llvm-svn: 62194
 2009-01-13 23:23:30 +00:00
Dan Gohman
1407484178 The list-td and list-tdrr schedulers don't yet support physreg 
scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.

llvm-svn: 62177
 2009-01-13 20:24:13 +00:00
Duncan Sands
ffc6133318 When replacing uses and the same node is reached 
via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.

llvm-svn: 62169
 2009-01-13 15:17:14 +00:00
Evan Cheng
f343168f1f FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block. 
llvm-svn: 62144
 2009-01-13 03:57:45 +00:00
Devang Patel
76007e009e Use DebugInfo interface to lower dbg_* intrinsics. 
llvm-svn: 62126
 2009-01-13 00:32:17 +00:00
Evan Cheng
b2c42c648d Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency. 
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.

llvm-svn: 62074
 2009-01-12 03:19:55 +00:00
Evan Cheng
8e7d88b916 This is a dup of pr2659.ll. 
llvm-svn: 62029
 2009-01-10 19:06:32 +00:00
Evan Cheng
ed74d8ac2a Duplicated node may produce a non-physical register def. 
llvm-svn: 62015
 2009-01-09 22:44:02 +00:00
Evan Cheng
c1f5a659de Add test case from PR2659. 
llvm-svn: 62006
 2009-01-09 21:01:31 +00:00
Dan Gohman
ea1086b7f2 PR2659 was fixed by r61847. Add the testcase as a regression test. 
llvm-svn: 61986
 2009-01-09 08:16:12 +00:00
Chris Lattner
9170731cb7 this test should not run opt -std-compile-opts, it should run 
just llc.

llvm-svn: 61979
 2009-01-09 05:32:00 +00:00
Misha Brukman
b51cdfadda Fix off-by-one error in traversing an array; this fixes a test. 
The error was reported by gcc-4.3.0 during compilation.

llvm-svn: 61896
 2009-01-07 23:07:29 +00:00