3554 Commits

Author SHA1 Message Date
Arthur Eubanks
7c6b46e87e Revert "[DAGCombiner] handle more store value forwarding"
This reverts commit f35a09daebd0a90daa536432e62a2476f708150d.

Causes miscompiles, see D138899
2023-02-13 19:07:28 -08:00
Arthur Eubanks
ac6219d0ae Revert "[DAGCombiner] fix comments for D138899; NFC"
This reverts commit 63854f91d3ee1056796a5ef27753648396cac6ec.

Dependent commit to be reverted.
2023-02-13 19:07:27 -08:00
Dinar Temirbulatov
d44b31eca2 [DAGCombine] Allow DAGCombine to remove dead masked stores.
Remove a dead masked store if another one has the same base pointer and mask or
the following store has all true constant mask and size if equal or bigger to
the first store.

Differential Revision: https://reviews.llvm.org/D143069
2023-02-13 16:11:11 +00:00
Simon Pilgrim
ce63cd3bf1 [DAG] Fold freeze(concat_vectors(x,y,...)) -> concat_vectors(freeze(x),freeze(y),...)
Another of the cleanups necessary for D136529
2023-02-08 20:26:43 +00:00
Simon Pilgrim
b7deb71ef5 [DAG] Fold freeze(build_pair(x,y)) -> build_pair(freeze(x),freeze(y))
One of the cleanups necessary for D136529 - another being how we're going to handle moving freeze through multiple result nodes (like uaddo and subcarry)
2023-02-08 17:54:03 +00:00
David Green
1af3f596f6 [DAG] Fold Op(vecreduce(a), vecreduce(b)) into vecreduce(Op(a,b))
So long as the operation is reassociative, we can reassociate the double
vecreduce from for example fadd(vecreduce(a), vecreduce(b)) to
vecreduce(fadd(a,b)). This will in general save a few instructions, but some
architectures (MVE) require the opposite fold, so a shouldExpandReduction is
added to account for it. Only targets that use shouldExpandReduction will be
affected.

Differential Revision: https://reviews.llvm.org/D141870
2023-02-08 11:43:36 +00:00
Fangrui Song
a13645cf8c DAGCombiner: fix -Wunused-private-field. NFC 2023-02-07 22:33:56 -08:00
Yeting Kuo
7bc2cd614e [VP][DAGCombiner] Introduce generalized pattern match for vp sdnodes.
The patch tries to solve duplicated combine work for vp sdnodes. The idea is to
introduce MatchConext that verifies specific patterns and generate specific node
infromation. There is two MatchConext in DAGCombiner. EmptyMatcher is for
normal nodes and VPMatcher is for vp nodes.

The idea of this patch is come form Simon Moll's proposal [0]. I only fixed some
minor issues and added few new features in this patch.

[0]: c38a14484a

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141891
2023-02-08 13:45:35 +08:00
Dinar Temirbulatov
8fdc3ff220 [DAGCombine] Allow scalable type dead store elimination.
Add support to allow removing a dead store for scalable types. Avoid to remove
scalable type store in favor of fixed type store, since scalable type size is
unknown at the compile time.

Differential Revision: https://reviews.llvm.org/D142100
2023-02-08 00:57:26 +00:00
Samuel Parker
91f8289ff0 Revert "[DAGCombine] Fold redundant select"
This reverts commit bbdf24357932b064f2aa18ea1356b474e0220dde.
2023-02-07 10:37:20 +00:00
Chen Zheng
63854f91d3 [DAGCombiner] fix comments for D138899; NFC 2023-02-07 00:32:34 -05:00
David Green
120ce83660 [DAG] Add visitABD optimizations
This adds basic a visitABD to optimize ABDS and ABDU nodes, similar to the
existing visitAVG method.

The fold I was initially interested in was folding shuffles though the binop.
This also:
- Marks ABDS and ABDU as commutative binops (https://alive2.llvm.org/ce/z/oCDogb
  and https://alive2.llvm.org/ce/z/7zrs86).
- Add reassociative folds.
- Add constant folding using max(x,y)-min(x,y)
- Canonicalizes constants to the RHS
- Folds abds x, 0 -> abs(x) (https://alive2.llvm.org/ce/z/4ZEibv)
- Folds abdu x, 0 -> x (https://alive2.llvm.org/ce/z/J_rKqx)
- Folds abd x, undef -> 0 (https://alive2.llvm.org/ce/z/NV6Nsv and
  https://alive2.llvm.org/ce/z/vs92hu).

Differential Revision: https://reviews.llvm.org/D143193
2023-02-05 10:28:54 +00:00
Simon Pilgrim
723b6cf7a8 [DAG] visitFREEZE - handle case where the folded node merges with another existing node
Fixes #60413
2023-02-04 20:53:47 +00:00
Simon Pilgrim
8f25e382c5 [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
I'm intending to add generic legalization in the future, but for now I've added basic support to targets that have the necessary MIN/MAX support to expand to SUB(MAX(X,Y),MIN(X,Y)).

This exposed a couple of issues with the DAG combines - in particular we need to catch trunc(abs(sub(ext(x),ext(y)))) patterns earlier before the SSE/AVX vector trunc expansion folds trigger.

Differential Revision: https://reviews.llvm.org/D142288
2023-02-04 11:25:51 +00:00
Samuel Parker
bbdf243579 [DAGCombine] Fold redundant select
If a chain of two selects share a true/false value and are controlled
by two setcc nodes, that are never both true, we can fold away one of
the selects. So, the following:
(select (setcc X, const0, eq), Y,
  (select (setcc X, const1, eq), Z, Y))

Can be combined to:
  select (setcc X, const1, eq) Z, Y

Differential Revision: https://reviews.llvm.org/D142535
2023-02-02 09:43:21 +00:00
Chen Zheng
f35a09daeb [DAGCombiner] handle more store value forwarding
When lowering calls on target like PPC, some stack loads
will be generated for by value parameters. Node CALLSEQ_START
prevents such loads from being combined.

Suggested by @RolandF, this patch removes the unnecessary
loads for the byval parameter by extending ForwardStoreValueToDirectLoad

Reviewed By: nemanjai, RolandF

Differential Revision: https://reviews.llvm.org/D138899
2023-02-01 21:06:17 -05:00
Samuel Parker
038f7debfd [DAGCombine] fp_to_sint isSaturatingMinMax
Recommitting after fixing scalable vector crash.

Check for single smax pattern against zero when converting from a
small enough float.

Differential Revision: https://reviews.llvm.org/D142481
2023-01-30 12:25:25 +00:00
Kazu Hirata
55e2cd1609 Use llvm::count{lr}_{zero,one} (NFC) 2023-01-28 12:41:20 -08:00
Samuel Parker
e60b91df13 Revert "[DAGCombine] fp_to_sint isSaturatingMinMax"
This reverts commit 85395af27241ab9c8d5763b8afcaa07f1bab26d5.

This is causing trouble with scalable vectors.
2023-01-27 15:42:12 +00:00
Samuel Parker
85395af272 [DAGCombine] fp_to_sint isSaturatingMinMax
Check for single smax pattern against zero when converting from a
small enough float.

Differential Revision: https://reviews.llvm.org/D142481
2023-01-26 12:37:43 +00:00
Simon Pilgrim
d1426cd484 [DAG] visitAnd - fold (and (ext (and V, c1)), c2) -> (and (ext V), (and c1, (ext c2)))
Also, move the XformToShuffleWithZero and combineCarryDiamond folds later after some of the more basic canonicalizations/combines (such as this) have had a chance to occur

Fixes the v8i1-masks.ll regression from D127115
2023-01-23 14:28:37 +00:00
Matt Arsenault
65420c8041 DAG: Use getNegatedExpression in combineMinNumMaxNum
Computing the negated RHS expression just to see if it compares equal
and throw it away feels dirty.
2023-01-23 06:07:23 -04:00
Matt Arsenault
3b80d02992 DAG: Look through fneg when trying to create unsafe minnum/maxnum
This makes most sense for isFNegFree targets, but shouldn't make
things worse without it. This avoids AMDGPU test regressions in a
future patch.

For some reason APFloat::compareAbsoluteValue is private, so compute
the neg of the constants.
2023-01-23 06:07:22 -04:00
Wang, Xin10
88eae6ef9f [DAGCombine]Expand usage of CreateBuildVecShuffle to make full use of vector ops
Now, when llc encounters the case that contains a lot of
extract_vector_elt and a BUILD_VECTOR, it will replace these to
vector_shuffle to decrease the size of code, the actions are done in
createBuildVecShuffle in DAGCombiner.cpp, but now the code cannot handle
the case that the size of source vector reg is more than twice the dest
size.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D139685
2023-01-23 11:45:38 +08:00
Simon Pilgrim
556c94e73e [DAG] visitINSERT_VECTOR_ELT - use mergeEltWithShuffle to merge inserted vector element chain into base shuffle node
This allows us to merge insert_elt(insert_elt(shuffle(x,y),extract_elt(x,c1),c2),extract_elt(y,c3),c4) style insertion chains into a new shuffle node.

I had hoped to remove mergeInsertEltWithShuffle entirely, but that case doesn't have the one use limits so we would regress in a few other cases.

Fixes the vector-shuffle-combining.ll regressions in D127115
2023-01-22 17:19:48 +00:00
Simon Pilgrim
96d0c4b35c [DAG] mergeInsertEltWithShuffle - pull out mergeEltWithShuffle helper. NFCI.
This will allow us to reuse the code to merge an extracted scalar into an updated shuffle in a future patch.

Another step towards fixing some shuffle regressions in D127115.
2023-01-22 13:57:53 +00:00
Simon Pilgrim
8d929d1cdd [DAG] Convert static combineABSToABD to DAGCombiner::foldABSToABD. NFCI.
This will make some future legality checks easier.
2023-01-21 18:23:41 +00:00
Simon Pilgrim
3129bdce8d [DAG] visitINSERT_VECTOR_ELT - move mergeInsertEltWithShuffle / combineInsertEltToShuffle folds after canonicalization
Noticed while triaging D127115 regressions - there's no need to attempt these costly folds until after the easy canonicalization cases have been addressed
2023-01-20 14:57:33 +00:00
Amaury Séchet
7e5681cf29 [DAG] Peek through ZEXT/TRUNC in foldAddSubMasked1
Fix a regression in D141883

Depends on D141883

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D141884
2023-01-19 13:23:42 +00:00
Amaury Séchet
2826869d7b [DAG] Do not combine any_ext when we combine and into zext.
This transofrm loses information that can be useful for other transforms.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D141883
2023-01-19 12:37:05 +00:00
Roman Lebedev
7460842fb2
[DAGCombiner] combineShuffleOfSplatVal(): don't assert that shuffle is non-undef
As per the test case from Steven Johnson in https://reviews.llvm.org/rGf8d9097168b7#1165311
we can indeed encounter such shuffles, that produce all-undef after folding,
before something else manages to optimize them away.
2023-01-18 18:45:08 +03:00
Haojian Wu
9936064d66 Remove an unused variable, NFC 2023-01-18 13:08:21 +01:00
Simon Pilgrim
73cdbbea02 [DAG] combineInsertEltToShuffle - split off mergeInsertEltWithShuffle fold. NFC.
combineInsertEltToShuffle was performing 2 very different folds in the same call, merging "(insert_vector_elt (vector_shuffle X, Y), (extract_vector_elt X, N), IdxC) --> (vector_shuffle X, Y)" and "(insert_vector_elt V, (bitcast X from vector type), IdxC) --> bitcast(shuffle (bitcast V), (extended X), Mask)"

The folds are currently still attempted in the same order as before (just as 2 seperate calls) so there should be no change in behaviour.

First step towards some adjustments to mergeInsertEltWithShuffle for D127115.
2023-01-18 11:56:36 +00:00
David Green
21df504399 [DAG][ARM][AArch64] Transform max(a,b) - min(a,b) -> abd(a,b)
This adds both signed and unsigned transforms for
max(a, b) - min(a, b) -> abd(a, b).

unsigned: https://alive2.llvm.org/ce/z/RF4jGQ
signed: https://alive2.llvm.org/ce/z/Cjr2zE

Fixes: #59894

Differential Revision: https://reviews.llvm.org/D141706
2023-01-18 11:44:26 +00:00
David Green
e26ec330c4 [DAG][AArch64][ARM] Combine abd(sub(x, y)) to abd if the sub is nsw
This implements the fold (abs (sub nsw x, y)) -> abds(x, y). Providing
the sub is nsw this appears to be valid without the extensions that are
usually used for abds. https://alive2.llvm.org/ce/z/XHVaB3. The
equivalent abdu combine seems to not be valid.

Differential Revision: https://reviews.llvm.org/D141665
2023-01-18 10:10:52 +00:00
Amaury Séchet
396ad408fd [DAG] Recombine (binop (shift x y))
This helps address regressions in D127115 .

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D141809
2023-01-16 02:20:29 +00:00
Roman Lebedev
f8d9097168
[DAGCombiner] combineShuffleOfSplatVal(): try to canonicalize to a splat shuffle
As noted in https://reviews.llvm.org/D141778#inline-1369900,
we fail to produce splat shuffles from certain sequences
of shuffles, that may have non-shuffles in the middle of seq.

There is a big pitfail to avoid here: just because `isSplatValue()`
says that all demanded elements are splat, we can't pick any random
one of them, because some of them could be undef! We must ignore those!
2023-01-15 21:11:33 +03:00
HanSheng Zhang
95414345d5
[DAGCombiner] visitFREEZE(): gracefully handle node invalidation
When we freeze operands of an operation that we are trying to freeze,
doing so may invalidate the original SDValue. We should just re-fetch
it from the ISD::FREEZE node, because if we bail, we'd hopefully just
revisit the node and do that again.

Fixes https://github.com/llvm/llvm-project/issues/59891

Differential Revision: https://reviews.llvm.org/D141256
2023-01-13 21:53:29 +03:00
Roman Lebedev
5ffa8c4019
[NFC][DAGCombiner] Fix typo in visitFREEZE() 2023-01-13 21:52:47 +03:00
Craig Topper
c8bd5343df [DAGCombiner][RISCV] Pre-promote (zext (abs X)) to (abs (sext X)) when X has an illegal type.
Type legalization will insert a sign extend anyway. By doing it
early we can remove the zext. ComputeNumSignBits can't spot it
after type legalization because type legalization may expand
the abs to sra+xor+sub.

If the zext result type is larger than the type to be promoted to,
we'll promote to a legal type and then zext the rest of the way.
If the legal type is larger than the destination type we can promote
and then truncate.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D140509
2023-01-13 10:40:25 -08:00
Guillaume Chatelet
8fd5558b29 [NFC] Use TypeSize::geFixedValue() instead of TypeSize::getFixedSize()
This change is one of a series to implement the discussion from
https://reviews.llvm.org/D141134.
2023-01-11 16:49:38 +00:00
Guillaume Chatelet
48f5d77eee [NFC] Use TypeSize::getKnownMinValue() instead of TypeSize::getKnownMinSize()
This change is one of a series to implement the discussion from
https://reviews.llvm.org/D141134.
2023-01-11 16:36:39 +00:00
Amaury Séchet
c0d7f0ca00 [DAGCombine] fold (sext (sext_inreg x)) -> (sext (trunc x))
This fixes a regression introduced by D127115 in test/CodeGen/PowerPC/store-forward-be64.ll

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D140993
2023-01-10 20:33:02 +00:00
chenglin.bi
be7d0d6db5 [DAGCombiner] Fix issue with rot chain pattern
faa35fc87370 fix the case of negative input shift. But when `c1`, `c2` is not the same side, it will also cause negative shift amount.
And that negative shift amount can't normalize by urem. So add one more bit size to normalize the last shift amount.

Fix: https://github.com/llvm/llvm-project/issues/59898

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D141363
2023-01-11 01:29:09 +08:00
serge-sans-paille
38818b60c5
Move from llvm::makeArrayRef to ArrayRef deduction guides - llvm/ part
Use deduction guides instead of helper functions.

The only non-automatic changes have been:

1. ArrayRef(some_uint8_pointer, 0) needs to be changed into ArrayRef(some_uint8_pointer, (size_t)0) to avoid an ambiguous call with ArrayRef((uint8_t*), (uint8_t*))
2. CVSymbol sym(makeArrayRef(symStorage)); needed to be rewritten as CVSymbol sym{ArrayRef(symStorage)}; otherwise the compiler is confused and thinks we have a (bad) function prototype. There was a few similar situation across the codebase.
3. ADL doesn't seem to work the same for deduction-guides and functions, so at some point the llvm namespace must be explicitly stated.
4. The "reference mode" of makeArrayRef(ArrayRef<T> &) that acts as no-op is not supported (a constructor cannot achieve that).

Per reviewers' comment, some useless makeArrayRef have been removed in the process.

This is a follow-up to https://reviews.llvm.org/D140896 that introduced
the deduction guides.

Differential Revision: https://reviews.llvm.org/D140955
2023-01-05 14:11:08 +01:00
Roman Lebedev
2a43a4478c
[NFCI][DAGCombiner] foldExtendVectorInregToExtendOfSubvector(): just build new VT
Changing element type seems to not play well with non-simple types,
even though we are operating on EVT's here.
2023-01-05 01:33:24 +03:00
Roman Lebedev
41005b7ab2
[DAGCombiner] Do try to combine ISD::ANY_EXTEND_VECTOR_INREG nodes
These weren't previously getting combined at all here,
only in target-specific combines.
2023-01-05 01:12:31 +03:00
Roman Lebedev
317a1adfe4
[DAGCombiner] Fold *_EXTEND_INREG of one of CONCAT_VECTORS operands into *_EXTEND of operand
This appears to be the root problematic pattern
for AArch64 regression in D140677.

We already do this, and many more, as target-specific X86 combines,
so this isn't causing much of an impact.
2023-01-05 01:12:31 +03:00
Roman Lebedev
846d06c707
[DAG] tryToFoldExtendOfConstant(): sext undef is not undef
https://alive2.llvm.org/ce/z/cLGpWV, but https://alive2.llvm.org/ce/z/TGNH4P
2023-01-04 22:42:43 +03:00
Roman Lebedev
4fc417ec37
[DAGCombiner] convertBuildVecZextToBuildVecWithZeros(): rework split factor calculation
The original computation was both making assumptions that do not hold
in practice, and being overly pessimistic. We should just check
every possible split factor, and pick the best one.

Fixes https://github.com/llvm/llvm-project/issues/59781
2023-01-02 18:34:35 +03:00