4536 Commits

Author SHA1 Message Date
Manuel Carrasco
c8d8e5e210
[DebugInfo] Add macro tracking support to DebugInfoFinder (#179931)
Extend `DebugInfoFinder` to collect and expose macro debug information
(`DIMacro` and `DIMacroFile` nodes).

Also update `ModuleDebugInfoPrinter` to display macro information
including the macro type, name, value, and source location.

-----

The motivation behind this PR is that `DebugInfoFinder` is key for the
[SPIRV-LLVM-Translator](https://github.com/KhronosGroup/SPIRV-LLVM-Translator)
and also for future support of debug info in the SPIRV backend in LLVM.

This new lookup of `DIMacro` with their `DIMacroFile` when available
simplifies the logic around the translation for this debug information.
2026-02-06 15:33:04 +00:00
Matt Arsenault
2502e3b7ba
IR: Promote "denormal-fp-math" to a first class attribute (#174293)
Convert "denormal-fp-math" and "denormal-fp-math-f32" into a first
class denormal_fpenv attribute. Previously the query for the effective
denormal mode involved two string attribute queries with parsing. I'm
introducing more uses of this, so it makes sense to convert this
to a more efficient encoding. The old representation was also awkward
since it was split across two separate attributes. The new encoding
just stores the default and float modes as bitfields, largely avoiding
the need to consider if the other mode is set.

The syntax in the common cases looks like this:
  `denormal_fpenv(preservesign,preservesign)`
  `denormal_fpenv(float: preservesign,preservesign)`
  `denormal_fpenv(dynamic,dynamic float: preservesign,preservesign)`

I wasn't sure about reusing the float type name instead of adding a
new keyword. It's parsed as a type but only accepts float. I'm also
debating switching the name to subnormal to match the current
preferred IEEE terminology (also used by nofpclass and other
contexts).

This has a behavior change when using the command flag debug
options to set the denormal mode. The behavior of the flag
ignored functions with an explicit attribute set, per
the default and f32 version. Now that these are one attribute,
the flag logic can't distinguish which of the two components
were explicitly set on the function. Only one test appeared to
rely on this behavior, so I just avoided using the flags in it.

This also does not perform all the code cleanups this enables.
In particular the attributor handling could be cleaned up.

I also guessed at how to support this in MLIR. I followed
MemoryEffects as a reference; it appears bitfields are expanded
into arguments to attributes, so the representation there is
a bit uglier with the 2 2-element fields flattened into 4 arguments.
2026-02-05 13:31:26 +00:00
Jay Foad
7ea33e6848
[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)
The first input operand of SUBREG_TO_REG was an immediate that most
targets set to 0. In practice it had no effect on codegen. Remove it.
2026-02-04 17:35:21 +00:00
Vladislav Dzhidzhoev
b9cecee3fb
Reland "[DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)" (#165032)
This is an attempt to merge https://reviews.llvm.org/D144006 with LTO
fix.

The last merge attempt was
https://github.com/llvm/llvm-project/pull/75385.
The issue with it was investigated in
https://github.com/llvm/llvm-project/pull/75385#issuecomment-2386684121.
The problem happens when 
1. Several modules are being linked.
2. There are several DISubprograms that initially belong to different
modules but represent the same source code function (for example, a
function included from the same source code file).
3. Some of such DISubprograms survive IR linking. It may happen if one
of them is inlined somewhere or if the functions that have these
DISubprograms attached have internal linkage.
4. Each of these DISubprograms has a local type that corresponds to the
same source code type. These types are initially from different modules,
but have the same ODR identifier.

If the same (in the sense of ODR identifier/ODR uniquing rules) local
type is present in two modules, and these modules are linked together,
the type gets uniqued. A DIType, that happens to be loaded first,
survives linking, and the references on other types with the same ODR
identifier from the modules loaded later are replaced with the
references on the DIType loaded first. Since defintion subprograms, in
scope of which these types are located, are not deduplicated, the linker
output may contain multiple DISubprogram's having the same (uniqued)
type in their retainedNodes lists.
Further compilation of such modules causes crashes.

To tackle that,
* previous solution to handle LTO linking with local types in
retainedNodes is removed (cloneLocalTypes() function),
* for each loaded distinct (definition) DISubprogram, its retainedNodes
list is scanned after loading, and DITypes with a scope of another
subprogram are removed. If something from a Function corresponding to
the DISubprogram references uniqued type, we rely on cross-CU links.

Additionally:
* a check is added to Verifier to report about local types located in a
wrong retainedNodes list,

Original commit message follows.
---------

RFC https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544

Similar to imported declarations, the patch tracks function-local types in
DISubprogram's 'retainedNodes' field. DwarfDebug is adjusted in accordance with
the aforementioned metadata change and provided a support of function-local
types scoped within a lexical block.

The patch assumes that DICompileUnit's 'enums field' no longer tracks local
types and DwarfDebug would assert if any locally-scoped types get placed there.

Authored-by: Kristina Bessonova <kbessonova@accesssoftek.com>
Co-authored-by: Jeremy Morse <jeremy.morse@sony.com>
2026-02-04 00:34:52 +01:00
Laxman Sole
1a23bca645
[DebugInfo][NVPTX] Adding support for inlined_at debug directive in NVPTX backend (#170239)
This change adds support for emitting the enhanced PTX debugging
directives `function_name` and `inlined_at` as part of the `.loc`
directive in the NVPTX backend.

`.loc` syntax - 
>.loc file_index line_number column_position

`.loc` syntax with `inlined_at` attribute - 
>.loc file_index line_number column_position,function_name label {+
immediate }, inlined_at file_index2 line_number2 column_position2

`inlined_at` attribute specified as part of the `.loc` directive
indicates PTX instructions that are generated from a function that got
inlined. It specifies the source location at which the specified
function is inlined. `file_index2`, `line_number2`, and
`column_position2` specify the location at which the function is
inlined.

The `function_name` attribute specifies an offset in the DWARF section-
`.debug_str`. Offset is specified as a label expression or a label +
immediate expression, where label is defined in the `.debug_str`
section. DWARF section `.debug_str` contains ASCII null-terminated
strings that specify the name of the function that is inlined.

These attributes were introduced in PTX ISA version 7.2 (see NVIDIA’s
documentation:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#debugging-directives-loc
).

To support these features, the PR introduces a new `NVPTXDwarfDebug`
class derived from `DwarfDebug`, which implements NVPTX-specific logic
for emitting these directives. The base DwarfDebug infrastructure is
extended with new virtual functions (`initializeTargetDebugInfo()` and
`recordTargetSourceLine()`) that enable the NVPTX backend to generate
this additional debug information.

The MC layer is also updated to emit the NVPTX-specific `.loc`
attributes (function_name and inlined_at). The implementation applies to
PTX ISA 7.2 and later when the debug-info emission kind is either
lineTableOnly or DebugDirectiveOnly. A new command-line option,
`--line-info-inlined-at=<true/false>`, is added to control whether the
inlined_at attribute is generated.

Note - The `NVCC` compiler already emits the `.loc` directive with
`inlined_at` when compiled with `-lineinfo` option.
2026-02-01 22:33:53 -08:00
Ryan Cowan
c88dd45081
[AArch64][GlobalISel] Exclude arm64 from failing tests (#178849)
As pointed out by the buildbots &
https://github.com/llvm/llvm-project/pull/174746#issuecomment-3821237987,
some of the tests modified by
https://github.com/llvm/llvm-project/pull/174746 are missing exclusions
for arm64 target triples causing the builds to fail.

I have added these exclusions here.
2026-01-30 12:10:07 +00:00
Ryan Cowan
ad1a45b903
[AArch64] Use GISel for optnone functions (#174746)
Currently, when SDAG is run on AArch64 and an `optnone` function is
encountered, the selector is chosen as FastISel. AArch64 makes use of
GlobalISel at O0 and this patch aims to align `optnone` with this
functionality.

A flag is exposed to enable this functionality for a given backend but,
as AArch64 is currently the only backend I could find using GlobalISel
at O0 this is the only one with it implemented. This flag is set when
the target supports GlobalISel & GlobalISel hasn't been forced by the
user, the target machine or by being at an optimisation level lower than
`EnableGlobalISelAtO`.

If this happens, the GlobalISel passes are included as shown in
`llvm/test/CodeGen/AArch64/O3-pipeline.ll` and skipped by IRTranslator
for functions not marked as `optnone`.

In updating the tests based on this functionality, I found some unused
check lines or run lines that mixed SDAG with GlobalISel pass names
which have been fixed.

---------

Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
2026-01-29 16:30:22 +00:00
Aleksandar Spasojevic
cb043d78b3
[AMDGPU] Propagate debug locations to si-wqm instructions (#168573)
Debug metadata propagation in SIWholeQuadMode pass.
2026-01-26 16:38:51 +01:00
Justin Fargnoli
9fc5fd0ad6
[NVPTX] Update the default SM to 7.5 (#176021)
Update NVPTX's default SM to sm_75. This matches the behavior of offline
compilation tools in the CUDA Toolkit (nvcc, ptxas, ...)
2026-01-22 18:26:55 +00:00
Eli Friedman
da34f9bb45
[AArch64] Fix Windows prologue handling to pair more registers. (#170214)
Currently, there's code to suppress pairing, but we don't actually need
to suppress that; we just need to suppress the formation of
pre-decrement/post-increment instructions.

Pairing saves an instruction in some cases, and enables packed unwind in
some cases.
2026-01-16 15:36:47 -08:00
David Stenberg
6fd8c36417
[DebugInfo] Drop stale entry value-limitation for call site values (#172340)
Entry value operations could previously not be combined with other
operations in debug expressions, meaning that we had to skip emitting
call site values in such cases. This DIExpression limitation was removed
in 57a371d7010802804343d17b85ac5e0d28d0f309, so we should be free to
emit call site values for such cases now, for example:

    extern void call(int, int);
    void entry_value (int param) {
        call(param + 222, param - 444);
    }

This change exposed a call site parameter entry order issue in the
dbgcall-site-expr-entry-value.mir test case. That ordering issue is
tracked in #43998, and I don't think there is anything inherent in this
patch that caused that.
2026-01-15 16:04:23 +01:00
Liu Ke
8610d359c5
[DebugInfo] Only generate template parameters in the skeleton CU for a template function/type with simplified name (3/3) (#175879)
Currently, when generating debug info for skeleton units, all template
parameters are emitted unconditionally. To optimize debug info size, the
emission should be conditional — providing parameters only for template
types/functions whose names have actually been simplified. As described
in [this
RFC](https://discourse.llvm.org/t/rfc-debuginfo-selectively-generate-template-parameters-in-the-skeleton-cu/89395).
Previous patches: #175130, #175708
2026-01-15 10:35:49 +08:00
David Stenberg
30e399a675
[DebugInfo] Find call site values for params in preserved registers (#172339)
For example, given code like this:

    int local = value();
    callee(local);
    return local;

resulting in assembly like:

    movl    %eax, %ebx // %eax = local
    movl    %eax, %edi
    callq   callee@PLT

the call site value generation did not understand that the value of
local is stored in the callee-saved %ebx during the call, and did not
emit any call site value. This patch addresses that, resulting in:

    DW_TAG_call_site_parameter
      DW_AT_location      (DW_OP_reg5 RDI)
      DW_AT_call_value    (DW_OP_breg3 RBX+0)

This code does not keep track if any succeeding instructions save
registers, meaning that it fails to emit a call site value for a case
like this:

    movq    %rax, %rdi
    movq    %rax, %rbx
    callq   callee@PLT

The test case dbgcall-site-preserved-clobbered.mir has been added for
that. This should be rather easy to address, but can be done in a
follow-up patch.

Building a clang-21 RelWithDebInfo binary for x86-64 without/with this
patch results in a ~1.8% increase of the number of call site parameter
entries with a location (from 1792876 to 1825718). This also reduces the
number of call site parameter entries using DW_OP_entry_value locations,
which are not guaranteed to be printable as they require the frame above
to provide a call site value for that parameter, from 57718 to 34871.

Fixes #43464.
2026-01-14 16:50:56 +01:00
Austin Jiang
e6cdfb75ac
Fix typos and spelling errors across codebase (#156270)
Corrected various spelling mistakes such as 'occurred', 'receiver',
'initialized', 'length', and others in comments, variable names,
function names, and documentation throughout the project. These
changes improve code readability and maintain consistency in naming
and documentation.

Co-authored-by: Louis Dionne <ldionne.2@gmail.com>
2026-01-13 11:52:46 -05:00
ZhaoQi
aa0ba7e01d
[LoongArch][Driver] Allow -gsplit-dwarf and -mrelax to be used together (#175727)
Benefit from https://github.com/llvm/llvm-project/pull/166597 and
https://github.com/llvm/llvm-project/pull/164813, DWARF fission is now
compatible with linker relaxation.

Similar to RISC-V, this commit allows `-gsplit-dwarf` and `-mrelax` to
be used together.

A new test `relax_dwo_ranges.ll` same as RISC-V is also added.
2026-01-13 20:05:48 +08:00
Aiden Grossman
9f0d0bbaf4
[X86][NewPM] Port x86-fixup-setcc (#175609)
Similar to other portings, except this time we do not refactor to an
impl since there is a single runOnMachineFunction definition that can
easily be made static. Test coverage added.
2026-01-12 11:31:41 -08:00
Aiden Grossman
eba79bc335
[X86][NewPM] Port x86-fixup-bw-insts to NPM (#175399)
Similar to other pass portings. Refactor into an implementation class,
rename the old pass, and add a wrapper around the implementation for the
new pass manager. Handle PSI/MBFI similar to other backend passes.
2026-01-11 10:41:21 -08:00
Sam Elliott
1eebd2a42e
[RISCV] Mark Xqccmp as not experimental (#175066) 2026-01-10 07:50:29 -08:00
Prabhu Rajasekaran
4b31ad94e0
[UEFI] Codeview do not crash when no llvm.dbg.cu (#174460)
PR #142970 Added for Windows targets to emit minimal codeview metadata
even when debug info is disabled. This crashes the backend for UEFI
x86_64-uefi triple as llvm.dbg.cu is expected unconditionally there.
Handling it correctly in AsmPrinter and adding a regression test.
2026-01-06 09:52:24 -08:00
Aiden Grossman
b6d6e9113f
[X86][NewPM] Port x86-cmov-conversion to NewPM (#174311)
Standard port. Refactor into an implementation class, call it from the
legacy and new PMs, and add test coverage.
2026-01-04 09:15:04 +00:00
Aiden Grossman
e6206d567b
[X86][NewPM] Port X86FixupLEAs to NPM
This patch ports X86FixupLEAs to the new pass manager and adds some test
coverage.

Reviewers: paperchalice, arsenm, RKSimon, phoebewang

Pull Request: https://github.com/llvm/llvm-project/pull/173744
2025-12-31 10:40:46 -08:00
Sudharsan Veeravalli
520ba7d0e5
[RISCV] Mark the Xqci Qualcomm uC Vendor Extension as non-experimental (#173331)
Version 0.13 of the Xqci Qualcomm uC Vendor Extension has been marked as
frozen. We've had assembler support for this since LLVM20 and code
generation support since LLVM21. I think we have enough coverage in the
code base to mark the extension as non-experimental.
2025-12-24 07:10:47 +05:30
Erik Enikeev
4cbaa40f70
[mips][micromips] Add mayRaiseFPException to appropriate instructions, mark all instructions that read FCSR (FCR31) rounding bits as doing so (#170322) 2025-12-18 23:06:36 +01:00
Orlando Cazalet-Hyams
1ba5afeb8c
[DWARF] Support block-form DW_AT_GNU_call_site_target_clobbered (#172450)
Not sure whether this comes up in practice, but I noticed a switch block
I missed in #172167
2025-12-17 09:44:28 +00:00
Orlando Cazalet-Hyams
3e32735020
[DWARF] Add support for DW_GNU_call_target_clobbered (#172336)
Fixes assertion trip introduced in #172167

See https://issues.chromium.org/issues/468825583#comment2
2025-12-15 18:24:21 +00:00
Orlando Cazalet-Hyams
792704038a
[DebugInfo][DWARF] Use DW_AT_call_target_clobbered for exprs with volatile regs (#172167)
Without this patch DW_AT_call_target is used for all indirect call address
location expressions. The DWARF spec says:

    For indirect calls or jumps where the address is not computable without use
    of registers or memory locations that might be clobbered by the call the
    DW_AT_call_target_clobbered attribute is used instead of the
    DW_AT_call_target attribute.

This patch implements that behaviour.
2025-12-15 12:54:18 +00:00
Orlando Cazalet-Hyams
fa1dceb67f
[DebugInfo][DWARF] Allow memory locations in DW_AT_call_target expressions (#171183)
Fixes #70949. Prior to PR #151378 memory locations were incorrect; that
patch prevented the emission of the incorrect locations.

This patch fixes the underlying issue.
2025-12-13 17:37:35 +00:00
Michael Buch
5bc7b9d462
[llvm][dwarfdump] Print the name (if available) of entities referenced by DW_AT_import (#171859)
Instead of this:
```
0x00018cff:   DW_TAG_imported_declaration
                DW_AT_decl_line (12)
                DW_AT_import    (0x0000000000018cfb)
```
print:
```
0x00018cff:   DW_TAG_imported_declaration
                DW_AT_decl_line (12)
                DW_AT_import    (0x0000000000018cfb "platform")
```

Where `0x0000000000018cfb` in this example could be a `DW_TAG_module`
with `DW_AT_name ("platform")`
2025-12-12 08:23:02 +00:00
Shubham Sandeep Rastogi
16e6055273
Revert "[SelectionDAG] Salvage debuginfo when combining load and sext… (#171745)
… instrs. (#169779)"

This reverts commit 2b958b9ee24b8ea36dcc777b2d1bcfb66c4972b6.

I might have broken the sanitizer-x86_64-linux bot


/home/b/sanitizer-x86_64-linux/build/llvm-project/compiler-rt/lib/sanitizer_common/sanitizer_procmaps_linux.cpp
clang++:
/home/b/sanitizer-x86_64-linux/build/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:248:
const T &llvm::ArrayRef<llvm::DbgValueLocEntry>::operator[](size_t)
const [T = llvm::DbgValueLocEntry]: Assertion `Index < Length &&
"Invalid index!"' failed.
2025-12-10 16:49:59 -08:00
Shubham Sandeep Rastogi
2b958b9ee2
[SelectionDAG] Salvage debuginfo when combining load and sext instrs. (#169779)
SelectionDAG uses the DAGCombiner to fold a load followed by a sext to a
load and sext instruction. For example, in x86 we will see that

```
%1 = load i32, ptr @GlobArr
  #dbg_value(i32 %1, !43, !DIExpression(), !52)
%2 = sext i32 %1 to i64, !dbg !53
```

is converted to:

```
%0:gr64_nosp = MOVSX64rm32 $rip, 1, $noreg, @GlobArr, $noreg, debug-instr-number 1, debug-location !51
DBG_VALUE $noreg, $noreg, !"Idx", !DIExpression(), debug-location !52
```

The `DBG_VALUE` needs to be transferred correctly to the new combined
instruction, and it needs to be appended with a `DIExpression` which
contains a `DW_OP_LLVM_fragment`, describing that the lower bits of the
virtual register contain the value.

This patch fixes the above described problem.
2025-12-10 14:43:38 -08:00
Tom Tromey
efbbca62d1
[llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType (#165880)
Consider this Ada type:

```
   type Array_Type is array (Natural range <>) of Integer;
   type Record_Type (L1, L2 : Natural) is record
      I1 : Integer;
      A1 : Array_Type (1 .. L1);
      I2 : Integer;
      A2 : Array_Type (1 .. L2);
      I3 : Integer;
   end record;
```

Here, the array fields have lengths that depend on the discriminants of
the record type. However, in this case the array lengths cannot be
expressed as DWARF location expressions, with the issue being that "A2"
has a non-constant offset, but an expression involving
DW_OP_push_object_address will push the address of the field -- with no
way to find the location of "L2".

In a case like this, I believe the correct DWARF is to emit the array
ranges using a direct reference to the discriminant, like:

```
 <3><1156>: Abbrev Number: 1 (DW_TAG_member)
    <1157>   DW_AT_name        : l1
...
 <3><1177>: Abbrev Number: 6 (DW_TAG_array_type)
    <1178>   DW_AT_name        : (indirect string, offset: 0x1a0b): vla__record_type__T4b
    <117c>   DW_AT_type        : <0x1287>
    <1180>   DW_AT_sibling     : <0x118e>
 <4><1184>: Abbrev Number: 7 (DW_TAG_subrange_type)
    <1185>   DW_AT_type        : <0x1280>
    <1189>   DW_AT_upper_bound : <0x1156>
```

(FWIW this is what GCC has done for years.)

This patch makes this possible in LLVM, by letting a DISubrangeType
refer to a DIDerivedType. gnat-llvm can then arrange for the DIE
reference to be correct by setting the array type's scope to be the
record.
2025-12-04 09:38:14 +09:00
daniilavdeev
cc1c41724d
[dwarf] make dwarf fission compatible with RISCV relaxations 2/2 (#164813)
This patch makes DWARF fission compatible with RISC-V relaxations by
using indirect addressing for the DW_AT_high_pc attribute. This
eliminates the remaining relocations in .dwo files.
2025-11-26 15:36:02 +03:00
daniilavdeev
5f777b2c8f
[dwarf] make dwarf fission compatible with RISCV relaxations 1/2 (#166597)
Currently, -gsplit-dwarf and -mrelax are incompatible options in Clang.
The issue is that .dwo files should not contain any relocations, as they
are not processed by the linker. However, relaxable code emits
relocations in DWARF for debug ranges that reside in the .dwo file when
DWARF fission is enabled.

This patch makes DWARF fission compatible with RISC-V relaxations. It
uses the StartxEndx DWARF forms in .debug_rnglists.dwo, which allow
referencing addresses from .debug_addr instead of using absolute
addresses. This approach eliminates relocations from .dwo files.
2025-11-26 00:52:22 +03:00
Jeremy Morse
2cf550a040
[DebugInfo] Force early line-zero calls to have meaningful locations (#156850)
In functions that have been seriously deformed during optimisation,
there can be call instructions with line-zero immediately after frame
setup (see C reproducer in the test added). Our previous algorithms for
prologue_end ignored these, meaning someone entering a function at
prologue_end would break-in after a function call had completed. Prefer
instead to place prologue_end and the function scope-line on the line
zero call: this isn't false (it's the first meaningful instruction of the
function) and is approximately true. Given a less than ideal function,
this is an OK solution.
2025-11-20 10:20:47 +00:00
Shubham Sandeep Rastogi
0dd3cb55e2
Reland instr-ref-target-hooks-sp-clobber.mir (#168136)
This test was failing on chromium builds with error:

```
/Volumes/Work/s/w/ir/x/w/llvm_build/bin/llc -o - /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir -run-pass=livedebugvalues | /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir # RUN: at line 8
+ /Volumes/Work/s/w/ir/x/w/llvm_build/bin/llc -o - /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir -run-pass=livedebugvalues
+ /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
error: YAML:121:3: unknown key 'stackSizePPR'
  stackSizePPR:    0
  ^~~~~~~~~~~~

FileCheck error: '<stdin>' is empty.
FileCheck command line:  /Volumes/Work/s/w/ir/x/w/llvm_build/bin/FileCheck /Volumes/Work/s/w/ir/x/w/llvm-llvm-project/llvm/test/DebugInfo/AArch64/instr-ref-target-hooks-sp-clobber.mir
```

This is an attempt to reland the failing test
2025-11-18 11:18:19 -08:00
Greg Clayton
488151254f
Don't check frame base as varies if registers are available from targets. (#168124)
Fixes a buildbot issue stemming from
https://github.com/llvm/llvm-project/pull/167986
2025-11-14 14:06:36 -08:00
Shubham Sandeep Rastogi
c40a69439e
Remove instr-ref-target-hooks-sp-clobber.mir (#168125)
This test is failing on the chromium x64 mac build because of invalid
MIR. The rest of the patch is okay, so I am just deleting the test for
now.
2025-11-14 13:47:36 -08:00
Matt Arsenault
dbd97c8d55
DebugInfo: Relax codeview-empty-dbg-cu-crash test's version check (#168111) 2025-11-14 20:38:02 +00:00
Greg Clayton
8b59622425
Add the ability to load DWARF64 .debug_str_offsets tables for DWARF32 DWARF units in .dwp files. (#167986)
This path is updating the reading capabilities of the LLVM DWARF parser
for a llvm-dwp patch https://github.com/llvm/llvm-project/pull/167457
that will emit .dwp files where the compile units are DWARF32 and the
.debug_str_offsets tables will be emitted as DWARF64 to allow .debug_str
sections that exceed 4GB in size.
2025-11-14 11:22:05 -08:00
Shubham Sandeep Rastogi
44b94a4f75
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
This patch adds the target hooks required by Instruction Referencing for
the AArch64 target, as mentioned in
https://llvm.org/docs/InstrRefDebugInfo.html#target-hooks

Which allows the Instruction Referenced LiveDebugValues Pass to track
spills and restore instructions.

With this patch we can use the
`llvm/utils/llvm-locstats/llvm-locstats.py` to see the coverage
statistics on a clang.dSYM built with in RelWithDebInfo we can see:

coverage with dbg_value:
```
=================================================
            Debug Location Statistics       
 =================================================
     cov%           samples         percentage(~)  
 -------------------------------------------------
   0%              5828021               38%
   (0%,10%)         127739                0%
   [10%,20%)        143344                0%
   [20%,30%)        172100                1%
   [30%,40%)        193173                1%
   [40%,50%)        127366                0%
   [50%,60%)        308350                2%
   [60%,70%)        257055                1%
   [70%,80%)        212410                1%
   [80%,90%)        295316                1%
   [90%,100%)       349280                2%
   100%            7313157               47%
 =================================================
 -the number of debug variables processed: 15327311
 -PC ranges covered: 67%
 -------------------------------------------------
 -total availability: 62%
 =================================================
 ```
 
coverage with InstrRef without target hooks fix:
```
 =================================================
            Debug Location Statistics       
 =================================================
     cov%           samples         percentage(~)  
 -------------------------------------------------
   0%              6052807               39%
   (0%,10%)         127710                0%
   [10%,20%)        129999                0%
   [20%,30%)        155011                1%
   [30%,40%)        171206                1%
   [40%,50%)        102861                0%
   [50%,60%)        264734                1%
   [60%,70%)        212386                1%
   [70%,80%)        176872                1%
   [80%,90%)        242120                1%
   [90%,100%)       254465                1%
   100%            7437215               48%
 =================================================
 -the number of debug variables processed: 15327386
 -PC ranges covered: 67%
 -------------------------------------------------
 -total availability: 60%
 =================================================
 ```
 
coverage with InstrRef with target hooks fix:
```
 =================================================
            Debug Location Statistics       
 =================================================
     cov%           samples         percentage(~)  
 -------------------------------------------------
   0%              5972267               39%
   (0%,10%)         118873                0%
   [10%,20%)        127138                0%
   [20%,30%)        153181                1%
   [30%,40%)        170102                1%
   [40%,50%)        102180                0%
   [50%,60%)        263672                1%
   [60%,70%)        212865                1%
   [70%,80%)        176633                1%
   [80%,90%)        242403                1%
   [90%,100%)       264441                1%
   100%            7494527               48%
 =================================================
 -the number of debug variables processed: 15298282
 -PC ranges covered: 71%
 -------------------------------------------------
 -total availability: 61%
 =================================================
 ```
 
 I believe this should be a good indication that Instruction Referencing should be turned on for AArch64?
2025-11-14 10:36:47 -08:00
Aiden Grossman
c44bd37176
[X86][NewPM] Port X86 FP Stackifier Pass to NewPM
Reviewers: arsenm, RKSimon, paperchalice, phoebewang

Reviewed By: arsenm, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/167911
2025-11-13 21:11:33 +00:00
Matt Arsenault
2e489f77ba
CodeGen: Fix CodeView crashes with empty llvm.dbg.cu (#163286) 2025-11-12 14:59:42 -08:00
Michael Buch
658b5e35a7
[llvm][DebugInfo] Adjust ModuleDebugInfoPrinter to versioned language names (#167293)
We shouldn't be calling `getUnversionedName` unconditionally because
DWARFv6-enabled Clang will emit versioned language names that are
versioned (i.e., `sourceLanguageName`...see new test case). We need to
check `hasVersionedName` and pick the appropriate API based on that.
Otherwise we assert in `getUnversionedName`.
2025-11-11 09:29:55 +00:00
Vladislav Dzhidzhoev
e2a2c03eef
[DebugInfo] Add Verifier check for incorrectly-scoped retainedNodes (#166855)
These checks ensure that retained nodes of a DISubprogram belong to the
subprogram.

Tests with incorrect IR are fixed. We should not have variables of one subprogram present in retained nodes of other subprograms.

Also, interface for accessing DISubprogram's retained nodes is slightly
refactored. `DISubprogram::visitRetainedNodes` and
`DISubprogram::forEachRetainedNode` are added to avoid repeating checks
like
```
if (const auto *LV = dyn_cast<DILocalVariable>(N))
  ...
else if (const auto *L = dyn_cast<DILabel>(N))
  ...
else if (const auto *IE = dyn_cast<DIImportedEntity>(N))
  ...
```
2025-11-10 13:13:49 +01:00
Laxman Sole
53b64b0208
[DebugInfo] Adjusting DWARF version to fix a test failure in aix-ppc64 pipeline (#167019)
Test added in #165023 had DWARF V5 but for the targets that uses
`XCOFF`, some sections of DWARF v5 are not initialized.
2025-11-07 14:35:25 -08:00
Laxman Sole
b1bd74e1cc
[LLVM][DebugInfo] Allow ExtraData field to be a node reference (#165023)
This change enhances debug info metadata handling to support node
references in the `extraData` field for `DW_TAG_member`,
`DW_TAG_variable`, and `DW_TAG_inheritance` tags.
The change enables LLVM to handle both direct constant values (e.g.,
extraData: i8 1) and node references (e.g., extraData: !18 where !18 =
!{ i8 1 }).
2025-11-06 07:38:51 -08:00
Santanu Das
63d6e3eb46
[DebugInfo] Assign best possible debugloc to bundle (#164573)
The debug info attached to the BUNDLE is the first instruction in the
BUNDLE, even if a better debug info (line:column) is present in the
later instructions of the bundle. The patch tries to get a better debug
info first. If not, then a worse debug info without line number is
chosen.

---------

Co-authored-by: Vladislav Dzhidzhoev <dzhidzhoev@gmail.com>
Co-authored-by: Orlando Cazalet-Hyams <orlandoch.och@gmail.com>
2025-11-05 20:26:00 +05:30
Laxman Sole
6fe3eccdf4
[llvm][DebugInfo] Emit 0/1 for constant boolean values (#151225)
Previously, sign-extending a 1-bit boolean operand in `#DBG_VALUE` would
convert `true` to -1 (i.e., 0xffffffffffffffff). However, DWARF treats
booleans as unsigned values, so this resulted in the attribute
`DW_AT_const_value(0xffffffffffffffff)` being emitted. As a result, the
debugger would display the value as `255` instead of `true`.

This change modifies the behavior to use zero-extension for 1-bit values
instead, ensuring that `true` is represented as 1. Consequently, the
DWARF attribute emitted is now `DW_AT_const_value(1)`, which allows the
debugger to correctly display the boolean as `true`.
2025-11-03 13:34:44 -08:00
Vladimir Gorsunov
e3ef3e24f1
[NativePDB] Fix crash in llvm-pdbutil (#164871)
Fix out of buffer read when value of --type-index was too big

Co-authored-by: Alexandre Ganea <aganea@havenstudios.com>
2025-11-01 15:36:38 +00:00
Michael Buch
10fbbb62ce
[llvm][DebugInfo][ObjC] Make sure we link backing ivars to their DW_TAG_APPLE_property (#165409)
Depends on:
* https://github.com/llvm/llvm-project/pull/165373

When an Objective-C property has a backing ivar, we would previously not
add a `DW_AT_APPLE_property` to the ivar's `DW_TAG_member`. This is what
was intended based on the [Objective-C DebugInfo
docs](https://github.com/llvm/llvm-project/blob/main/llvm/docs/SourceLevelDebugging.rst#proposal)
but is not what LLVM currently generates.

LLDB currently doesn't ever try linking the `ObjCPropertyDecl`s to their
`ObjCIvarDecl`s, but if we wanted to, this debug-info patch is a
pre-requisite.
2025-10-31 10:25:58 +00:00