3 Commits

Author SHA1 Message Date
Ayush Kumar Gaur
c381180536
[mlir][AMDGPU] Avoid verifier crash in DPPOp on vector operand types (#178887)
### whats the problem 
mlir-opt could crash while verifying amdgpu.dpp when its operands had
vector
types, such as ARM SME tile vectors produced by arm_sme.get_tile.
The crash occurred during IR verification, before any lowering or passes
ran.

### why it happens 
DPPOp::verify() called Type::getIntOrFloatBitWidth() on the operand
type.
When the operand was a VectorType, this hit an assertion because only
scalar
integer and float types have a bitwidth.

### whats the fix 
Query the bitwidth on the element type using getElementTypeOrSelf()
instead of
the container type.
Add a regression test to ensure amdgpu.dpp verification no longer
asserts on
vector operand types.

Fixes #178128
2026-02-07 08:25:03 -05:00
Krzysztof Drewniak
762c32aa08
[mlir][AMDGPU] Add wrappers for in-memory barriers on gfx1250 (#180112)
This commit introduces the `!amdgpu.ds_barrier_state` type and
operations on that type, including extracting its components and (more
importantly) provides wrappers around the upcoming barrier-management
instructions that will be added in gfx1250.

This commit is loosely based on work done for Triton, but this commit
provides slightly more lower level-primitives (namely a known-atomic
load for getting the barrier state instead of providing a `wait`
operation that includes an entire spin-loop, though if people want one
we could consider adding it.) These operations will allow LDS barriers
to be interacted with in a more type-safe manner.

The types and operations use the Ds naming scheme to match the
underlying instructions and to avoid confusion with the "LDS barrier"
already present in the AMDGPU dialect that was a workaround for LLVM's
memory fencing support.

(To summarize a potential usage pattern, one can use a pair of these
barriers to communicate between wave(s) in a workgroup that load data
into memory and a separate wave(s) that compute with that data.)

---------

Co-authored-by: Claude Opus 4.5 <noreply@anthropic.com>
2026-02-06 17:43:12 +00:00
Krzysztof Drewniak
52dfcab327
[NFC][mlir][AMDGPU] Partition dialect .td into multiple files (#178562)
Follow the style of other dialects by having a distiinct .td file for
each category of thing (type, attribdut, operation, enum) generated for
the AMDGPU dialect.

Nothing has changed, but a lot of things have been copy-pasted.
2026-01-29 15:10:20 -08:00