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Author	SHA1	Message	Date
Tom Stellard	48f29f21ee	AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic Summary: This returns a pointer to the dispatch packet, which can be used to load information about the kernel dispach. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D14898 llvm-svn: 254116	2015-11-26 00:43:29 +00:00
Matt Arsenault	3931948bb6	AMDGPU: Add pass to detect used kernel features Mark kernels that use certain features that require user SGPRs to support with kernel attributes. We need to know before instruction selection begins because it impacts the kernel calling convention lowering. For now this only detects the workitem intrinsics. llvm-svn: 252323	2015-11-06 18:01:57 +00:00

Author

SHA1

Message

Date

Tom Stellard

48f29f21ee

AMDGPU: Add llvm.amdgcn.dispatch.ptr intrinsic

Summary:
This returns a pointer to the dispatch packet, which can be used to load
information about the kernel dispach.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D14898

llvm-svn: 254116

2015-11-26 00:43:29 +00:00

Matt Arsenault

3931948bb6

AMDGPU: Add pass to detect used kernel features

Mark kernels that use certain features that require user
SGPRs to support with kernel attributes. We need to know
before instruction selection begins because it impacts
the kernel calling convention lowering.

For now this only detects the workitem intrinsics.

llvm-svn: 252323

2015-11-06 18:01:57 +00:00

2 Commits