183 Commits

Author SHA1 Message Date
Jakub Kuderski
f80a976acd [mlir][vector] Add gather lowering patterns
This is for targets that do not support gather-like ops, e.g., SPIR-V.

Gather is expanded into lower-level vector ops with memory accesses
guarded with `scf.if`.

I also considered generating `vector.maskedload`s, but decided against
it to keep the `memref` and `tensor` codepath closer together. There's a
good chance that if a target doesn't support gather it does not support
masked loads either.

Issue: https://github.com/llvm/llvm-project/issues/60905

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D145942
2023-03-14 10:59:30 -04:00
Nicolas Vasilache
203fad476b [mlir][DialectUtils] Cleanup IndexingUtils and provide more affine variants while reusing implementations
Differential Revision: https://reviews.llvm.org/D145784
2023-03-14 03:44:59 -07:00
Emilio Cota
350d7e33ff [mlir][vector] remove unnecessary VectorTransformOps include
While at it, add a dep that we missed in https://reviews.llvm.org/D145638.

Reviewed By: kuhar, dcaballe

Differential Revision: https://reviews.llvm.org/D145731
2023-03-09 18:23:36 -05:00
Jakub Kuderski
fb7ef637a8 [mlir][vector][nvgpu] Move MMA contraction preparation to VectorUtils
This pattern is not specific to nvgpu; I intend to use in SPIR-V codegen. `VectorTransforms` seems like a more generally useful place.

In addition:
-  Fix a bug in the second condition (the dimensions were swapped for RHS).
-  Add tests.
-  Add support for externally provided filter functions, similar to other vector transforms.
-  Prefer to transpose before zero/sign-extending inputs.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D145638
2023-03-09 14:56:21 -05:00
Matthias Springer
7ecc921deb [mlir][vector] Fix incorrect API usage in RewritePatterns
Incorrect API usage was detected by D144552.

Differential Revision: https://reviews.llvm.org/D145153
2023-03-02 13:58:37 +01:00
Diego Caballero
3a3ab2147d [mlir][Vector] Add support for high-order masked contractions
This patch adds support for masked vector.contract ops that needs to be
decomposed using the ContractionOpLowering pattern. It just slices the
mask according to the rest of the lowering.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D144427
2023-02-22 06:54:02 +00:00
Diego Caballero
c339f9e1c3 [mlir][Vector] Support masking for more contraction flavors
This patch adds masking support for more contraction flavors including those
with any combiner operation (add, mul, min, max, and, or, etc.) and
regular matmul contractions.

Combiner operations that are performing vertical reductions (and,
therefore, they are not represented with a horizontal reduction
operation) can be executed unmasked. However, the previous value of
the accumulator must be propagated for lanes that shouldn't accumulate.
We achieve this goal by introducing a select operation after the
accumulator to choose between the combined and the previous accumulator
value. This design decision is made to avoid introducing masking support
to all the arithmetic and logical operations in the Arith dialect. VP
intrinsics do not support pass-thru values either so we would have to
generate the same sequence when lowering to LLVM. The op + select
pattern is peepholed by some backend with native masking support for those
operations.

Consequently, this patch removes masking support from the vector.fma
operation to follow the same approach for all the combiner operations.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D144239
2023-02-22 01:47:44 +00:00
Kazu Hirata
9e5d2495ac Use APInt::isOne instead of APInt::isOneValue (NFC)
Note that isOneValue has been soft-deprecated in favor of isOne.
2023-02-19 23:06:36 -08:00
Thomas Raoux
e3a88a41af Revert "[mlir][vector] Prevent duplicating operations during vector distribute"
This reverts commit 2fc3c5c34c4c0ce94a217717a469620e06325fb0.
2023-02-17 03:07:16 +00:00
Lei Zhang
a1aad28d29 [mlir][vector] NFC: Improve vector type accessor methods
Plain `getVectorType()` can be quite confusing and error-prone
given that, well, vector ops always work on vector types, and
it can commonly involve both source and result vectors. So this
commit makes various such accessor methods to be explicit w.r.t.
source or result vectors.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D144159
2023-02-16 04:08:33 +00:00
Kazu Hirata
5382d28815 [mlir] Use std::optional instead of llvm::Optional (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2023-02-15 19:40:10 -08:00
Diego Caballero
1ac874c9aa [mlir][Vector] Add support for masked vector gather ops
This patch adds support for masked vector.gather ops using the
vector.mask representation. It includes the implementation of the
MaskableOpInterface, Linalg vectorizer support and lowering to LLVM.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D143939
2023-02-15 06:10:22 +00:00
Diego Caballero
9452356ddc [mlir][Vector] Add support for masked vector.contract
This patch adds support for masking vector.contract ops with the
vector.mask approach. This also includes the lowering of vector.contract
through the vector.outerproduct path to LLVM. For now, this only adds
support for one of the many potential flavors of
vector.contract/vector.outerproduct but unsupported cases will fail
gratefully.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D143965
2023-02-15 06:10:22 +00:00
Matthias Springer
9fa6b3504b [mlir][bufferization] Improve aliasing OpOperand/OpResult property
`getAliasingOpOperands`/`getAliasingOpResults` now encodes OpOperand/OpResult, buffer relation and a degree of certainty. E.g.:
```
// aliasingOpOperands(%r) = {(%t, EQUIV, DEFINITE)}
// aliasingOpResults(%t) = {(%r, EQUIV, DEFINITE)}
%r = tensor.insert %f into %t[%idx] : tensor<?xf32>

// aliasingOpOperands(%r) = {(%t0, EQUIV, MAYBE), (%t1, EQUIV, MAYBE)}
// aliasingOpResults(%t0) = {(%r, EQUIV, MAYBE)}
// aliasingOpResults(%t1) = {(%r, EQUIV, MAYBE)}
%r = arith.select %c, %t0, %t1 : tensor<?xf32>
```

`BufferizableOpInterface::bufferRelation` is removed, as it is now part of `getAliasingOpOperands`/`getAliasingOpResults`.

This change allows for better analysis, in particular wrt. equivalence. This allows additional optimizations and better error checking (which is sometimes overly conservative). Examples:

* EmptyTensorElimination can eliminate `tensor.empty` inside `scf.if` blocks. This requires a modeling of equivalence: It is not a per-OpResult property anymore. Instead, it can be specified for each OpOperand and OpResult. This is important because `tensor.empty` may be eliminated only if all values on the SSA use-def chain to the final consumer (`tensor.insert_slice`) are equivalent.
* The detection of "returning allocs from a block" can be improved. (Addresses a TODO in `assertNoAllocsReturned`.) This allows us to bufferize IR such as "yielding a `tensor.extract_slice` result from an `scf.if` branch", which currently fails to bufferize because the alloc detection is too conservative.
* Better bufferization of loops. Aliases of the iter_arg can be yielded (even if they are not equivalent) without having to realloc and copy the entire buffer on each iteration.

The above-mentioned examples are not yet implemented with this change. This change just improves the BufferizableOpInterface, its implementations and related helper functions, so that better aliasing information is available for each op.

Differential Revision: https://reviews.llvm.org/D142129
2023-02-09 11:35:03 +01:00
Thomas Raoux
2fc3c5c34c [mlir][vector] Prevent duplicating operations during vector distribute
We should distribute ops that have other uses than the yield op as this
would duplicate those ops.

Differential Revision: https://reviews.llvm.org/D143629
2023-02-09 08:26:35 +00:00
Diego Caballero
b1d82057ed [mlir][Vector] Add lowering support for 1-D masked multi-reductions
1-D multi-reductions follow a different lowering path (they are
converted to 2-D multi-reductions) so masked variants need to be
supported explicitly.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D143453
2023-02-07 20:03:38 +00:00
Matthias Springer
1ac248e485 [mlir][bufferization][NFC] Rename getAliasingOpOperand/getAliasingOpResult
* `getAliasingOpOperand` => `getAliasingOpOperands`
* `getAliasingOpResult` => `getAliasingOpResults`

Also a few minor code cleanups and better documentation.

Differential Revision: https://reviews.llvm.org/D142979
2023-02-01 10:07:41 +01:00
Matthias Springer
017be821da [mlir][vector][bufferize] Fix Windows build failure introduced by D141686 2023-01-31 09:36:20 +01:00
Matthias Springer
199f368e35 [mlir][vector][bufferize] Bufferize vector.mask and vector.yield
The masked op can currently not bufferize out-of-place. Such IR would be rejected by the One-Shot Bufferize because it would mean that a new buffer allocation is yielded from a block. Furthermore, only one operation is currently allowed inside `vector.mask`.

Differential Revision: https://reviews.llvm.org/D141686
2023-01-31 09:02:27 +01:00
Xiang Li
28f9bfe466 [mlir] skip 0-D vector in BubbleUpBitCastForStridedSliceInsert
InsertStridedSliceOp will not get 0-D vector result, so just skip 0-D vector in BubbleUpBitCastForStridedSliceInsert.
Fixes #60214  https://github.com/llvm/llvm-project/issues/60214

Differential Revision: https://reviews.llvm.org/D142319
2023-01-29 23:19:31 -05:00
Matthias Springer
a2b837ab04 [mlir] GreedyPatternRewriteDriver: Entry point takes single region
The rewrite driver is typically applied to a single region or all regions of the same op. There is no longer an overload to apply the rewrite driver to a list of regions.

This simplifies the rewrite driver implementation because the scope is now a single region as opposed to a list of regions.

Note: This change is not NFC because `config.maxIterations` and `config.maxNumRewrites` is now counted for each region separately. Furthermore, worklist filtering (`scope`) is now applied to each region separately.

Differential Revision: https://reviews.llvm.org/D142611
2023-01-27 11:23:04 +01:00
Benjamin Kramer
77f4c91c5e [mlir][vector] Allow transposing multi_reduction when the parallel dim is in the middle
The check for the outer lowering wasn't quite right.

Differential Revision: https://reviews.llvm.org/D142483
2023-01-26 18:06:42 +01:00
Frederik Gossen
1125c5c0b2 [MLIR] Remove scf.if builder with explicit result types and callbacks
Instead, use the builder and infer the return type based on the inner `yield` ops.
Also, fix uses that do not create the terminator as required for the callback builders.

Differential Revision: https://reviews.llvm.org/D142056
2023-01-20 10:52:08 -05:00
Thomas Raoux
435905ecf2 [mlir][vector] Add extra lowering for more transfer_write maps
Add pattern to lower transfer_write with permutation map that are not
permutation of minor identity map.

Differential Revision: https://reviews.llvm.org/D141815
2023-01-17 17:06:00 +00:00
Thomas Raoux
6dc9725471 [mlir][vector] Fix lowering of permutation maps for transfer_write op
The lowering of transfer write permutation maps didn't match the op definition:
93ccccb00d/mlir/include/mlir/Dialect/Vector/IR/VectorOps.td (L1476)

Fix the lowering and add a case to the integration test in
order to enforce the correct semantic.

Differential Revision: https://reviews.llvm.org/D141801
2023-01-17 17:04:04 +00:00
Quentin Colombet
edec423981 [mlir][vector] Share enums with the transform dialect
Refactor the definition of the enums that are used in the lower_vectors
operation of the transformation dialect.
This avoid duplicating the definition of all the configurations that
this operation can trigger.

NFC

Differential Revision: https://reviews.llvm.org/D141867
2023-01-17 11:11:17 +00:00
Kazu Hirata
0a81ace004 [mlir] Use std::optional instead of llvm::Optional (NFC)
This patch replaces (llvm::|)Optional< with std::optional<.  I'll post
a separate patch to remove #include "llvm/ADT/Optional.h".

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2023-01-14 01:25:58 -08:00
Kazu Hirata
a1fe1f5f77 [mlir] Add #include <optional> (NFC)
This patch adds #include <optional> to those files containing
llvm::Optional<...> or Optional<...>.

I'll post a separate patch to actually replace llvm::Optional with
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2023-01-13 21:05:06 -08:00
Diego Caballero
afc3756e6c [mlir][vector] Masking support for reductions in Linalg vectorizer
This patch enables vectorization of reductions in Linalg vectorizer
using the vector.mask operation. It also introduces the logic to slice
and propagate the vector mask of a masked multi-reduction to their
respective lowering operations.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D141571
2023-01-13 20:45:04 +00:00
Jeff Niu
1b60f0d73c [mlir][ods] Generate inferReturnTypes for ops with TypesMatchWith
Ops that use TypesMatchWith to constrain result types for verification
and to infer result types during parser generation should also be able
to have the `inferReturnTypes` method auto generated. This patch
upgrades the logic for generating `inferReturnTypes` to handle the
TypesMatchWith trait by building a type inference graph where each edge
corresponds to "type of A can be inferred from type of B", supporting
transformers other than `"$_self"`.

Reviewed By: lattner, rriddle

Differential Revision: https://reviews.llvm.org/D141231
2023-01-12 13:26:12 -08:00
Jeff Niu
4d67b27817 [mlir] Add operations to BlockAndValueMapping and rename it to IRMapping
The patch adds operations to `BlockAndValueMapping` and renames it to `IRMapping`. When operations are cloned, old operations are mapped to the cloned operations. This allows mapping from an operation to a cloned operation. Example:

```
Operation *opWithRegion = ...
Operation *opInsideRegion = &opWithRegion->front().front();

IRMapping map
Operation *newOpWithRegion = opWithRegion->clone(map);
Operation *newOpInsideRegion = map.lookupOrNull(opInsideRegion);
```

Migration instructions:
All includes to `mlir/IR/BlockAndValueMapping.h` should be replaced with `mlir/IR/IRMapping.h`. All uses of `BlockAndValueMapping` need to be renamed to `IRMapping`.

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D139665
2023-01-12 13:16:05 -08:00
Thomas Raoux
069d7d7e48 [mlir][vector] Fix crash in extractelement vec distribution
Prevent creating a vector of size 0 that would fail verifier.
Vector 1d with a single element should be treated like 0d vectors.

Differential Revision: https://reviews.llvm.org/D141452
2023-01-11 02:35:12 +00:00
Kazu Hirata
51ddfd76dd [mlir] Fix a warning
This patch fixes:

  mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp:947:13:
  error: variable 'distributedDim' set but not used
  [-Werror,-Wunused-but-set-variable]
2023-01-09 09:51:17 -08:00
Matthias Springer
1523b72946 [mlir][vector] Distribute vector.insert op
In case the distributed dim of the dest vector is also a dim of the src vector, each lane inserts a smaller part of the source vector. Otherwise, one lane inserts the entire src vector and the other lanes do nothing.

Differential Revision: https://reviews.llvm.org/D137953
2023-01-09 16:50:28 +01:00
Matthias Springer
73ce971c63 [mlir][vector] Distribute vector.insertelement op
In case of a distribution, only one lane inserts the scalar value. In case of a broadcast, every lane inserts the scalar.

Differential Revision: https://reviews.llvm.org/D137929
2023-01-09 16:41:08 +01:00
Matthias Springer
9085f00b4d [mlir][vector] Support vector.extract distribution of >1D vectors
Ops such as `%1 = vector.extract %0[2] : vector<5x96xf32>`.

Distribute the source vector, then extract. In case of a 1d extract, rewrite to vector.extractelement.

Differential Revision: https://reviews.llvm.org/D137646
2023-01-09 16:39:50 +01:00
Thomas Raoux
f41abcda5e [mlir][vector] Relax restriction on reduction distribution
Relax unnecessary restriction when distribution a vector.reduce op.
All the float and integer types can be supported by user's lambda.

Differential Revision: https://reviews.llvm.org/D141094
2023-01-06 16:20:17 +00:00
jacquesguan
490c77e46d [mlir][vector] Fix typo, NFC.
Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D140681
2022-12-28 11:46:45 +08:00
Matthias Springer
41e731f2a4 [mlir][vector] Add additional scalar vector transfer foldings
* Rewrite vector.transfer_write of vectors with 1 element to
  memref.store
* Rewrite vector.extract(vector.transfer_read) to memref.load

Differential Revision: https://reviews.llvm.org/D140391
2022-12-22 14:43:48 +01:00
Matthias Springer
2ec98ffbf1 [mlir][vector] Add scalar vector xfer to memref patterns
These patterns devectorize scalar transfers such as vector<f32> or vector<1xf32>.

Differential Revision: https://reviews.llvm.org/D140215
2022-12-19 10:27:49 +01:00
Fangrui Song
cbb0981388 [mlir] llvm::Optional::value => operator*/operator->
std::optional::value() has undesired exception checking semantics and is
unavailable in older Xcode (see _LIBCPP_AVAILABILITY_BAD_OPTIONAL_ACCESS). The
call sites block std::optional migration.
2022-12-17 19:07:38 +00:00
Ramkumar Ramachandra
22426110c5 mlir/tblgen: use std::optional in generation
This is part of an effort to migrate from llvm::Optional to
std::optional. This patch changes the way mlir-tblgen generates .inc
files, and modifies tests and documentation appropriately. It is a "no
compromises" patch, and doesn't leave the user with an unpleasant mix of
llvm::Optional and std::optional.

A non-trivial change has been made to ControlFlowInterfaces to split one
constructor into two, relating to a build failure on Windows.

See also: https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

Signed-off-by: Ramkumar Ramachandra <r@artagnon.com>

Differential Revision: https://reviews.llvm.org/D138934
2022-12-17 11:13:26 +01:00
Diego Caballero
72fd36448d [mlir][Vector] Initial masking support in Linalg vectorizer
This patch introduces the initial bits to support vector masking
using the `vector.mask` operation. Vectorization changes should be
NFC for non-masked cases. We can't test masked cases directly until
we extend the Transform dialect to support masking.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D137690
2022-12-13 01:33:06 +00:00
Kazu Hirata
192d9dd731 [mlir] Use std::nullopt instead of None in comments (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-04 19:58:32 -08:00
Kazu Hirata
70c73d1b72 [mlir] Use std::nullopt instead of None in comments (NFC)
This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-04 17:23:50 -08:00
Kazu Hirata
1a36588ec6 [mlir] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated.  The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-03 18:50:27 -08:00
River Riddle
b74192b7ae [mlir] Remove support for non-prefixed accessors
This finishes off a year long pursuit to LLVMify the generated
operation accessors, prefixing them with get/set. Support for
any other accessor naming is fully removed after this commit.

https://discourse.llvm.org/t/psa-raw-accessors-are-being-removed/65629

Differential Revision: https://reviews.llvm.org/D136727
2022-12-02 13:32:36 -08:00
Nicolas Vasilache
495acf98da [mlir][Linalg] NFC - Purge OpBuilder uses in favor of RewriterBase in places unrelated to op definitions
RewriterBase is the proper builder to use so one can listen to IR modifications (i.e. not just creation).

Differential Revision: https://reviews.llvm.org/D137922
2022-12-02 08:06:29 -08:00
Diego Caballero
eb7e2998d1 Reland "[mlir][Vector] Re-define masking semantics in vector.transfer ops""
This relands commit 847b5f82a4a34218bf16d6f83f1b7c32df3117ba.

Differential Revision: https://reviews.llvm.org/D138079
2022-11-29 03:36:54 +00:00
Nicolas Vasilache
7a69a9d7ae [NFC][mlir] VectorUtils / IndexingUtils simplifications and cleanups
This revision refactors and cleans up a bunch of infra related to vector, shapes and indexing into more reusable APIs.

Differential Revision: https://reviews.llvm.org/D138501
2022-11-22 23:42:29 -08:00