24235 Commits

Author SHA1 Message Date
Chad Rosier
d978ca0308 [ARM64] Increases the Sched Model accuracy for Cortex-A53.
Patch by Dave Estes <cestes@codeaurora.org>
http://reviews.llvm.org/D3769

llvm-svn: 209001
2014-05-16 17:15:33 +00:00
David Majnemer
78910fc4da InstSimplify: Improve handling of ashr/lshr
Summary:
Analyze the range of values produced by ashr/lshr cst, %V when it is
being used in an icmp.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3774

llvm-svn: 209000
2014-05-16 17:14:03 +00:00
David Majnemer
ea8d5dbf24 InstSimplify: Optimize using dividend in sdiv
Summary:
The dividend in an sdiv tells us the largest and smallest possible
results.  Use this fact to optimize comparisons against an sdiv with a
constant dividend.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3795

llvm-svn: 208999
2014-05-16 16:57:04 +00:00
Simon Atanasyan
b83f380ae4 [yaml2obj][ELF] Add an optional Size field to the YAML section declaration.
Now the only method to configure ELF section's content and size is to assign
a hexadecimal string to the `Content` field. Unfortunately this way is
completely useless when you need to declare a really large section.

To solve this problem this patch adds one more optional field `Size`
to the `RawContentSection` structure. When yaml2obj generates an ELF file
it uses the following algorithm:
1. If both `Content` and `Size` fields are missed create an empty section.
2. If only `Content` field is missed take section length from the `Size`
   field and fill the section by zero.
3. If only `Size` field is missed create a section using data from
   the `Content` field.
4. If both `Content` and `Size` fields are provided validate that the `Size`
   value is not less than size of `Content` data. Than take section length
   from the `Size`, fill beginning of the section by `Content` and the rest
   by zero.

Examples
--------
* Create a section 0x10000 bytes long filled by zero
  Name: .data
  Type: SHT_PROGBITS
  Flags: [ SHF_ALLOC ]
  Size: 0x10000

* Create a section 0x10000 bytes long starting from 'CA' 'FE' 'BA' 'BE'
  Name: .data
  Type: SHT_PROGBITS
  Flags: [ SHF_ALLOC ]
  Content: CAFEBABE
  Size: 0x10000

The patch reviewed by Michael Spencer.

llvm-svn: 208995
2014-05-16 16:01:00 +00:00
James Molloy
a70697e10e Re-enable inline memcpy expansion for Thumb1.
Patch by Moritz Roth!

llvm-svn: 208994
2014-05-16 14:24:22 +00:00
James Molloy
556763d2ef Fix the Load/Store optimization pass to work with Thumb1.
Patch by Moritz Roth!

llvm-svn: 208992
2014-05-16 14:14:30 +00:00
Zoran Jovanovic
6110e3bce6 [mips][mips64r6] Add SELEQZ and SELNEZ instructions
Differential Revision: http://reviews.llvm.org/D3743

llvm-svn: 208987
2014-05-16 13:40:57 +00:00
Zoran Jovanovic
52c56b93e5 [mips][mips64r6] Add Compact indexed jumps.
Differential Revision: http://reviews.llvm.org/D3707

llvm-svn: 208981
2014-05-16 13:19:46 +00:00
Rafael Espindola
5a52b9f139 Revert "Implement global merge optimization for global variables."
This reverts commit r208934.

The patch depends on aliases to GEPs with non zero offsets. That is not
supported and fairly broken.

The good news is that GlobalAlias is being redesigned and will have support
for offsets, so this patch should be a nice match for it.

llvm-svn: 208978
2014-05-16 13:02:18 +00:00
Zoran Jovanovic
5a8c1e2900 [mips][mips64r6] Add Compact zero-compare branch-and-link instructions
Differential Revision: http://reviews.llvm.org/D3718

llvm-svn: 208977
2014-05-16 12:27:19 +00:00
Zoran Jovanovic
3c8869dc6a [mips][mips64r6] Add compact branch instructions
Differential Revision: http://reviews.llvm.org/D3691

llvm-svn: 208974
2014-05-16 11:03:45 +00:00
Zoran Jovanovic
d04688d1c6 [mips][mips64r6] Add LWPC and LWUPC instructions
Differential Revision: http://reviews.llvm.org/D3788

llvm-svn: 208971
2014-05-16 10:27:10 +00:00
Zoran Jovanovic
027a5df93d [mips][mips64r6] Add Floating Point Compare setting Mask - CMP.condn.fmt
Differential Revision: http://reviews.llvm.org/D3750

llvm-svn: 208970
2014-05-16 09:48:29 +00:00
Tim Northover
5896b066e6 TableGen: fix operand counting for aliases
TableGen has a fairly dubious heuristic to decide whether an alias should be
printed: does the alias have lest operands than the real instruction. This is
bad enough (particularly with no way to override it), but it should at least be
calculated consistently for both strings.

This patch implements that logic: first get the *correct* string for the
variant, in the same way as the Matcher, without guessing; then count the
number of whitespace chars.

There are basically 4 changes this brings about after the previous
commits; all of these appear to be good, so I have changed the tests:

+ ARM64: we print "neg X, Y" instead of "sub X, xzr, Y".
+ ARM64: we skip implicit "uxtx" and "uxtw" modifiers.
+ Sparc: we print "mov A, B" instead of "or %g0, A, B".
+ Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B"

llvm-svn: 208969
2014-05-16 09:42:04 +00:00
Hao Liu
8579f0d4d1 [ARM64]Implement NEON post-increment LD1(lane) and post-increment LD1R.
llvm-svn: 208955
2014-05-16 09:39:02 +00:00
Zoran Jovanovic
b397fea9ab [mips][mips64r6] Add Floating Point Fused Multiply Add Subtract
Differential Revision: http://reviews.llvm.org/D3727

llvm-svn: 208952
2014-05-16 08:42:27 +00:00
Saleem Abdulrasool
056fc3da4a ARM: add some integer/floating point conversion libcalls
Add some Windows on ARM specific library calls.  These are provided by msvcrt,
and can be used to perform integer to floating-point conversions (and
vice-versa) mirroring similar functions in the RTABI.

llvm-svn: 208949
2014-05-16 05:41:33 +00:00
Justin Bogner
a119f32344 ProfileData: Allow multiple profiles in RawInstrProfReader
Allow multiple raw profiles to coexist in a single .profraw file,
given the following conditions:

- Zero padding at the end of or between profiles will be skipped.
- Each profile must start with a valid header.
- Mixing endianness or pointer sizes in concatenated profiles files is
  not allowed.

This is needed to handle cases where a program's shared libraries are
profiled as well as the main executable itself, as we'll need to emit
each executable's counters. Combining the tables in the runtime would
be expensive for the instrumented program.

rdar://16918688

llvm-svn: 208938
2014-05-16 00:38:00 +00:00
Reid Kleckner
d20c970aac musttail: Fix the verification of alignment attributes
Previously this would fail with an assertion failure when trying to add
an alignment attribute without a value.

llvm-svn: 208935
2014-05-15 23:58:57 +00:00
Jiangning Liu
932e1c3924 Implement global merge optimization for global variables.
This commit implements two command line switches -global-merge-on-external
and -global-merge-aligned, and both of them are false by default, so this
optimization is disabled by default for all targets.

For ARM64, some back-end behaviors need to be tuned to get this optimization
further enabled.

llvm-svn: 208934
2014-05-15 23:45:42 +00:00
David Blaikie
bc094f387b DebugInfo: Don't put fission type units in comdat sections.
Since type units in the dwo file are handled by a debug aware tool, they
don't need to leverage the ELF comdat grouping to implement
deduplication. Avoid creating all the .group sections for these as a
space optimization.

llvm-svn: 208930
2014-05-15 23:18:15 +00:00
Reed Kotler
6280d9711d Finish materialize for ints
Summary: We add code to materialize all integer literals.

Test Plan: simplestorei.ll

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3596

llvm-svn: 208923
2014-05-15 21:54:15 +00:00
Reid Kleckner
900d46ff39 Don't insert lifetime.end markers between a musttail call and ret
The allocas going out of scope are immediately killed by the return
instruction.

This is a resend of r208912, which was committed accidentally.

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D3792

llvm-svn: 208920
2014-05-15 21:10:46 +00:00
Reid Kleckner
b16564109b Revert "Don't insert lifetime.end markers between a musttail call and ret"
This reverts commit r208912.

It was committed accidentally without review.

llvm-svn: 208914
2014-05-15 20:41:05 +00:00
Reid Kleckner
26ab7ead45 Don't insert lifetime.end markers between a musttail call and ret
The allocas going out of scope are immediately killed by the return
instruction.

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D3630

llvm-svn: 208912
2014-05-15 20:39:13 +00:00
Reid Kleckner
f0915aa0e6 Teach the inliner how to preserve musttail invariants
The interesting case is what happens when you inline a musttail call
through a musttail call site.  In this case, we can't break perfect
forwarding or allow any stack growth.

Instead of merging control flow from the inlined return instruction
after a musttail call into the body of the caller, leave the inlined
return instruction in the caller so that the musttail call stays in the
tail position.

More work is required in http://reviews.llvm.org/D3630 to handle the
case where the inlined function has dynamic allocas or byval arguments.

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D3491

llvm-svn: 208910
2014-05-15 20:11:28 +00:00
Simon Atanasyan
54bb2e0092 [obj2yaml][ELF] Print relocation's offset as a hex number. Use a proper
types to hold relocation's offset and addend.

llvm-svn: 208906
2014-05-15 18:04:09 +00:00
Simon Atanasyan
8d59c8da41 [obj2yaml][ELF] Do not print empty Link and Info fields for ELF sections.
llvm-svn: 208905
2014-05-15 18:04:02 +00:00
Bradley Smith
597122b026 [ARM64] Improve diagnostics for Cn operands in SYS instructions
llvm-svn: 208902
2014-05-15 16:28:32 +00:00
Simon Atanasyan
73e047e54c [yaml2obj] Add "-o" command line option to specify an output file name.
llvm-svn: 208900
2014-05-15 16:14:02 +00:00
NAKAMURA Takumi
2d35a06080 llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll: Add explicit triple.
llvm-svn: 208897
2014-05-15 15:45:31 +00:00
Andrea Di Biagio
d621120533 [X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.
Added target specific combine rules to fold blend intrinsics according
to the following rules:
 1) fold(blend A, A, Mask) -> A;
 2) fold(blend A, B, <allZeros>) -> A;
 3) fold(blend A, B, <allOnes>) -> B.

Added two new tests to verify that the new folding rules work for all
the optimized blend intrinsics.

llvm-svn: 208895
2014-05-15 15:18:15 +00:00
Zoran Jovanovic
d6879febdc [mips][mips64r6] Add CLASS.fmt instructions
Differential Revision: http://reviews.llvm.org/D3712

llvm-svn: 208894
2014-05-15 15:16:36 +00:00
Zoran Jovanovic
bdf1cd374f [mips][mips64r6] Add RINT.fmt instructions
Differential Revision: http://reviews.llvm.org/D3711

llvm-svn: 208892
2014-05-15 15:04:37 +00:00
Zoran Jovanovic
702d27e4db [mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructions
Differential Revision: http://reviews.llvm.org/D3710

llvm-svn: 208891
2014-05-15 14:58:42 +00:00
Zoran Jovanovic
11d4ce1788 [mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructions
Differential Revision: http://reviews.llvm.org/D3709

llvm-svn: 208890
2014-05-15 14:54:06 +00:00
Tom Stellard
73b98ed8cf R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0
llvm-svn: 208886
2014-05-15 14:41:54 +00:00
Tom Stellard
365a2b49f2 R600/SI: Use VALU instructions for i1 ops
llvm-svn: 208885
2014-05-15 14:41:50 +00:00
Daniel Sanders
e17212d621 [mips][mips64r6] Add bitswap, and dbitswap
Summary: Depends on D3728

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3729

llvm-svn: 208877
2014-05-15 12:18:23 +00:00
Tim Northover
2509a3fc64 ARM64: print correct aliases for NEON mov & mvn instructions
In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.

llvm-svn: 208874
2014-05-15 12:11:02 +00:00
Daniel Sanders
01124a0132 [mips][mips64r6] Add align and dalign
Summary: Depends on D3689

Reviewers: vmedic, zoran.jovanovic, jkolek

Reviewed By: jkolek

Differential Revision: http://reviews.llvm.org/D3728

llvm-svn: 208872
2014-05-15 12:06:36 +00:00
Tim Northover
d8d65a69cf TableGen/ARM64: print aliases even if they have syntax variants.
To get at least one use of the change (and some actual tests) in with its
commit, I've enabled the AArch64 & ARM64 NEON mov aliases.

llvm-svn: 208867
2014-05-15 11:16:32 +00:00
Bradley Smith
5c44b08912 [ARM64] Improve load/store diagnostics and forbid 32-bit register addresses
llvm-svn: 208864
2014-05-15 11:08:30 +00:00
Bradley Smith
c294914adc [ARM64] Add/Fixup diagnostics for floating point immediates
llvm-svn: 208862
2014-05-15 11:07:28 +00:00
Daniel Sanders
b59e1a41f4 [mips][mips64r6] Add addiupc, aluipc, and auipc
Summary:
No support for symbols in place of the immediate yet since it requires new
relocations.

Depends on D3671

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3689

llvm-svn: 208858
2014-05-15 10:45:58 +00:00
Daniel Sanders
a3412b13d4 [mips][mips64r6] Add aui, daui, dahi, and dati
Summary: Depends on D3671

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3759

llvm-svn: 208857
2014-05-15 10:27:19 +00:00
Chandler Carruth
a0e5695ad9 Teach the constant folder to look through bitcast constant expressions
much more effectively when trying to constant fold a load of a constant.
Previously, we only handled bitcasts by trying to find a totally generic
byte representation of the constant and use that. Now, we look through
the bitcast to see what constant we might fold the load into, and then
try to form a constant expression cast of the found value that would be
equivalent to loading the value.

You might wonder why on earth this actually matters. Well, turns out
that the Itanium ABI causes us to create a single array for a vtable
where the first elements are virtual base offsets, followed by the
virtual function pointers. Because the array is homogenous the element
type is consistently i8* and we inttoptr the virtual base offsets into
the initial elements.

Then constructors bitcast these pointers to i64 pointers prior to
loading them. Boom, no more constant folding of virtual base offsets.
This is the first fix to LLVM to address the *insane* performance Eric
Niebler discovered with Clang on his range comprehensions[1]. There is
more to come though, this doesn't *really* fix the problem fully.

[1]: http://ericniebler.com/2014/04/27/range-comprehensions/

llvm-svn: 208856
2014-05-15 09:56:28 +00:00
Daniel Sanders
19627f470b [mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.
Summary:
They aren't implemented for any ISA at the moment.

Depends on D3670

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3671

llvm-svn: 208855
2014-05-15 09:47:43 +00:00
Dinesh Dwivedi
83c11da849 Reverting r208848, reason: build failure: sanitizer-x86_64-linux-bootstrap/builds/3399
llvm-svn: 208852
2014-05-15 08:22:55 +00:00
Dinesh Dwivedi
f675f4201b Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'
MIN(MIN(A, 23), 97) -> MIN(A, 23)
MAX(MAX(A, 97), 23) -> MAX(A, 97)

Differential Revision: http://reviews.llvm.org/D3629

llvm-svn: 208849
2014-05-15 06:13:40 +00:00