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40157 Commits

Author SHA1 Message Date
Mikhail Glushenkov
dc0a05df55 Formatting. 
llvm-svn: 109216
 2010-07-23 04:19:34 +00:00
Mikhail Glushenkov
1e5d7c6e82 Get rid of exceptions in llvmc. 
llvmc can be now compiled with llvm-gcc on Windows.

llvm-svn: 109215
 2010-07-23 03:42:55 +00:00
Bruno Cardoso Lopes
d618c8ac64 Declare CLMUL as a subtarget feature 
llvm-svn: 109207
 2010-07-23 01:22:45 +00:00
Bruno Cardoso Lopes
09dc24beac Add x86 CLMUL (Carry-less multiplication) cpu feature 
llvm-svn: 109206
 2010-07-23 01:17:51 +00:00
Eric Christopher
faf5c76114 80-col. 
llvm-svn: 109205
 2010-07-23 01:05:59 +00:00
Bruno Cardoso Lopes
acd9230b1b Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
llvm-svn: 109204
 2010-07-23 00:54:35 +00:00
Dale Johannesen
f2d75670b7 The only supported calling convention for X86-64 uses 
SSE, so we can't return floating point values if this
is disabled.  Detect this error for clang.

With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it.  Since nobody noticed this I think it's
OK to treat it as an error for now.

This also handles SSE-sized vectors of floating point.
8207686, 8204109.

llvm-svn: 109201
 2010-07-23 00:30:35 +00:00
Bruno Cardoso Lopes
e29e389678 Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously 
llvm-svn: 109198
 2010-07-23 00:14:54 +00:00
Chris Lattner
749ca32da1 eliminate the TargetInstrInfo::GetInstSizeInBytes hook. 
ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.

llvm-svn: 109171
 2010-07-22 21:27:00 +00:00
Chris Lattner
aba8ee38c2 remove the dwarf sizing stuff which is now dead, it was 
"yet another" copy of the dwarf EH emission code that was
copied, pasted and slightly hacked up.

llvm-svn: 109169
 2010-07-22 21:20:39 +00:00
Bruno Cardoso Lopes
0710c74f29 Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step 
llvm-svn: 109168
 2010-07-22 21:18:49 +00:00
Chris Lattner
8f3adc9057 remove the JIT "NeedsExactSize" feature and supporting logic. 
llvm-svn: 109167
 2010-07-22 21:17:55 +00:00
Chris Lattner
dab6888bb1 switch a private implementation of GetFunctionSizeInBytes. 
This is probably not the best way to implement "Force LR to 
be spilled if the Thumb function size is > 2048." do this, 
it should use the branch shortening infrastructure, but I'm
just preserving functionality here.

llvm-svn: 109165
 2010-07-22 21:14:33 +00:00
Chris Lattner
b3f608bbba X86MCInstLower now depends on AsmPrinter being around. 
llvm-svn: 109154
 2010-07-22 21:10:04 +00:00
Chris Lattner
083be4d384 instead of migrating it to the MC instruction encoder, just 
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and 
terrible in other ways.  Since "GetInstSizeInBytes" is really 
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code.  I will rip out the
NeedsExactSize hook next.

This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter

llvm-svn: 109149
 2010-07-22 21:05:13 +00:00
Devang Patel
5fa3813329 Speculatively revert 109117 
llvm-svn: 109132
 2010-07-22 18:44:00 +00:00
Xerxes Ranby
ff66cd43c4 ARMv4 JIT forgets to set the lr register when making a indirect function call. Fixes PR7608 
llvm-svn: 109125
 2010-07-22 17:28:34 +00:00
Gabor Greif
59f9970ba5 keep in 80 cols 
llvm-svn: 109122
 2010-07-22 17:18:03 +00:00
Devang Patel
fac440cfb6 Map MDNode correctly. 
A non function local MDNode can have an operand which is cloned by MapValue(). 

llvm-svn: 109117
 2010-07-22 16:35:00 +00:00
Gabor Greif
1a2da423c9 use cascading operator-> feature 
llvm-svn: 109104
 2010-07-22 13:49:27 +00:00
Gabor Greif
dde79d8f1a mass elimination of reliance on automatic iterator dereferencing 
llvm-svn: 109103
 2010-07-22 13:36:47 +00:00
Gabor Greif
84012a93ef simplify 
llvm-svn: 109101
 2010-07-22 13:07:39 +00:00
Gabor Greif
b8686360a1 do not access arguments via low-level interface, do not multiply dereference use_iterators 
llvm-svn: 109100
 2010-07-22 13:04:32 +00:00
Gabor Greif
10bb1f5462 pass dereferenced iterator to dyn_cast 
llvm-svn: 109099
 2010-07-22 11:48:35 +00:00
Gabor Greif
36f25dfd33 pass dereferenced iterator to dyn_cast 
llvm-svn: 109098
 2010-07-22 11:43:44 +00:00
Gabor Greif
d9f48ecb2e use -> instead of (*). 
llvm-svn: 109094
 2010-07-22 11:12:32 +00:00
Gabor Greif
07c8ad54da cache dereferenced iterator 
llvm-svn: 109093
 2010-07-22 11:07:46 +00:00
Gabor Greif
3e44ea1917 undo 80 column trespassing I caused 
llvm-svn: 109092
 2010-07-22 10:37:47 +00:00
Chandler Carruth
a1d7516cb7 Mark an assert-only variable as used. 
llvm-svn: 109091
 2010-07-22 08:02:25 +00:00
Chandler Carruth
2f8db38bb3 Fix the generated file name for CMake. 
llvm-svn: 109090
 2010-07-22 08:00:52 +00:00
Tobias Grosser
336734aca6 Add new RegionInfo pass. 
The RegionInfo pass detects single entry single exit regions in a function,
where a region is defined as any subgraph that is connected to the remaining
graph at only two spots.
Furthermore an hierarchical region tree is built.
Use it by calling "opt -regions analyze" or "opt -view-regions".

llvm-svn: 109089
 2010-07-22 07:46:31 +00:00
Chandler Carruth
3180f9f55f Attempt to fix linking issues with CMake. Please review other CMake users, 
especially on other platforms. Is there a better way to fix this.

llvm-svn: 109084
 2010-07-22 06:27:45 +00:00
Evan Cheng
bf32e54bac Re-apply r109079 with fix. 
llvm-svn: 109083
 2010-07-22 06:24:48 +00:00
Owen Anderson
6c55cccf87 Revert r109079, which broke a lot of CodeGen tests. 
llvm-svn: 109082
 2010-07-22 06:01:28 +00:00
Owen Anderson
14646cc074 Update CMake files. 
llvm-svn: 109081
 2010-07-22 06:00:01 +00:00
Reid Kleckner
d85e3c5a86 Initial modifications to MCAssembler and TargetMachine for the MCJIT. 
Patch by Olivier Meurant!

llvm-svn: 109080
 2010-07-22 05:58:53 +00:00
Evan Cheng
bd81bff672 Initialize RegLimit only when register pressure is being tracked. 
llvm-svn: 109079
 2010-07-22 05:18:41 +00:00
Eric Christopher
9a77382685 Custom lower the memory barrier instructions and add support 
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078
 2010-07-22 02:48:34 +00:00
Evan Cheng
3fabe07d4c Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into: 
mov     pc, r1
        .align  2
LJTI0_0_0:
        .long    LBB0_14

This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.

llvm-svn: 109076
 2010-07-22 02:09:47 +00:00
Eric Christopher
a4c435f1fa 80-columns. 
llvm-svn: 109070
 2010-07-22 00:26:08 +00:00
Nate Begeman
68a069a188 Make fast isel win64-aware w.r.t. call-clobbered regs 
llvm-svn: 109069
 2010-07-22 00:09:39 +00:00
Evan Cheng
285903853f More register pressure aware scheduling work. 
llvm-svn: 109064
 2010-07-21 23:53:58 +00:00
Bruno Cardoso Lopes
e3acfd4d58 Add more 256-bit forms for a bunch of regular AVX instructions 
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)

llvm-svn: 109063
 2010-07-21 23:53:50 +00:00
Dan Gohman
2637cc1a38 Make NamedMDNode not be a subclass of Value, and simplify the interface 
for creating and populating NamedMDNodes.

llvm-svn: 109061
 2010-07-21 23:38:33 +00:00
Rafael Espindola
350b1a449f Fixes win64. It was broken by a previous patch where I missed the !isWin64 
and then forced every register to be a vr128 on win64.

llvm-svn: 109060
 2010-07-21 23:19:57 +00:00
Owen Anderson
ac4a1ede17 Add INSTANTIATE_AG_PASS, which combines RegisterPass<> with RegisterAnalysisGroup<> for pass registration. 
llvm-svn: 109058
 2010-07-21 23:07:00 +00:00
Jim Grosbach
965a73a28c For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb 
rdar://8202967

llvm-svn: 109057
 2010-07-21 23:03:52 +00:00
Chris Lattner
5c91a5e747 add some rough support for making mcinst lowering work without an 
asmprinter or mangler around.  This is option #B for killing off 
X86InstrInfo::GetInstSizeInBytes.  Option #A (killing 
"needsexactsize") was sent for consideration to llvmdev.

llvm-svn: 109056
 2010-07-21 23:03:35 +00:00
Eric Christopher
84bdfd80df Baby steps towards ARM fast-isel. 
llvm-svn: 109047
 2010-07-21 22:26:11 +00:00
Owen Anderson
a57b97e7e7 Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). 
llvm-svn: 109045
 2010-07-21 22:09:45 +00:00