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14759 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
d618c8ac64 Declare CLMUL as a subtarget feature 
llvm-svn: 109207
 2010-07-23 01:22:45 +00:00
Bruno Cardoso Lopes
09dc24beac Add x86 CLMUL (Carry-less multiplication) cpu feature 
llvm-svn: 109206
 2010-07-23 01:17:51 +00:00
Bruno Cardoso Lopes
acd9230b1b Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
llvm-svn: 109204
 2010-07-23 00:54:35 +00:00
Dale Johannesen
f2d75670b7 The only supported calling convention for X86-64 uses 
SSE, so we can't return floating point values if this
is disabled.  Detect this error for clang.

With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it.  Since nobody noticed this I think it's
OK to treat it as an error for now.

This also handles SSE-sized vectors of floating point.
8207686, 8204109.

llvm-svn: 109201
 2010-07-23 00:30:35 +00:00
Bruno Cardoso Lopes
e29e389678 Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously 
llvm-svn: 109198
 2010-07-23 00:14:54 +00:00
Chris Lattner
749ca32da1 eliminate the TargetInstrInfo::GetInstSizeInBytes hook. 
ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.

llvm-svn: 109171
 2010-07-22 21:27:00 +00:00
Bruno Cardoso Lopes
0710c74f29 Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step 
llvm-svn: 109168
 2010-07-22 21:18:49 +00:00
Chris Lattner
8f3adc9057 remove the JIT "NeedsExactSize" feature and supporting logic. 
llvm-svn: 109167
 2010-07-22 21:17:55 +00:00
Chris Lattner
dab6888bb1 switch a private implementation of GetFunctionSizeInBytes. 
This is probably not the best way to implement "Force LR to 
be spilled if the Thumb function size is > 2048." do this, 
it should use the branch shortening infrastructure, but I'm
just preserving functionality here.

llvm-svn: 109165
 2010-07-22 21:14:33 +00:00
Chris Lattner
b3f608bbba X86MCInstLower now depends on AsmPrinter being around. 
llvm-svn: 109154
 2010-07-22 21:10:04 +00:00
Chris Lattner
083be4d384 instead of migrating it to the MC instruction encoder, just 
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and 
terrible in other ways.  Since "GetInstSizeInBytes" is really 
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code.  I will rip out the
NeedsExactSize hook next.

This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter

llvm-svn: 109149
 2010-07-22 21:05:13 +00:00
Xerxes Ranby
ff66cd43c4 ARMv4 JIT forgets to set the lr register when making a indirect function call. Fixes PR7608 
llvm-svn: 109125
 2010-07-22 17:28:34 +00:00
Gabor Greif
3e44ea1917 undo 80 column trespassing I caused 
llvm-svn: 109092
 2010-07-22 10:37:47 +00:00
Chandler Carruth
a1d7516cb7 Mark an assert-only variable as used. 
llvm-svn: 109091
 2010-07-22 08:02:25 +00:00
Chandler Carruth
2f8db38bb3 Fix the generated file name for CMake. 
llvm-svn: 109090
 2010-07-22 08:00:52 +00:00
Chandler Carruth
3180f9f55f Attempt to fix linking issues with CMake. Please review other CMake users, 
especially on other platforms. Is there a better way to fix this.

llvm-svn: 109084
 2010-07-22 06:27:45 +00:00
Owen Anderson
14646cc074 Update CMake files. 
llvm-svn: 109081
 2010-07-22 06:00:01 +00:00
Eric Christopher
9a77382685 Custom lower the memory barrier instructions and add support 
for lowering without sse2.  Add a couple of new testcases.

Fixes a few libgomp tests and latent bugs.  Remove a few todos.

llvm-svn: 109078
 2010-07-22 02:48:34 +00:00
Evan Cheng
3fabe07d4c Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into: 
mov     pc, r1
        .align  2
LJTI0_0_0:
        .long    LBB0_14

This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.

llvm-svn: 109076
 2010-07-22 02:09:47 +00:00
Eric Christopher
a4c435f1fa 80-columns. 
llvm-svn: 109070
 2010-07-22 00:26:08 +00:00
Nate Begeman
68a069a188 Make fast isel win64-aware w.r.t. call-clobbered regs 
llvm-svn: 109069
 2010-07-22 00:09:39 +00:00
Evan Cheng
285903853f More register pressure aware scheduling work. 
llvm-svn: 109064
 2010-07-21 23:53:58 +00:00
Bruno Cardoso Lopes
e3acfd4d58 Add more 256-bit forms for a bunch of regular AVX instructions 
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)

llvm-svn: 109063
 2010-07-21 23:53:50 +00:00
Rafael Espindola
350b1a449f Fixes win64. It was broken by a previous patch where I missed the !isWin64 
and then forced every register to be a vr128 on win64.

llvm-svn: 109060
 2010-07-21 23:19:57 +00:00
Jim Grosbach
965a73a28c For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb 
rdar://8202967

llvm-svn: 109057
 2010-07-21 23:03:52 +00:00
Chris Lattner
5c91a5e747 add some rough support for making mcinst lowering work without an 
asmprinter or mangler around.  This is option #B for killing off 
X86InstrInfo::GetInstSizeInBytes.  Option #A (killing 
"needsexactsize") was sent for consideration to llvmdev.

llvm-svn: 109056
 2010-07-21 23:03:35 +00:00
Eric Christopher
84bdfd80df Baby steps towards ARM fast-isel. 
llvm-svn: 109047
 2010-07-21 22:26:11 +00:00
Owen Anderson
a57b97e7e7 Fix batch of converting RegisterPass<> to INTIALIZE_PASS(). 
llvm-svn: 109045
 2010-07-21 22:09:45 +00:00
Bruno Cardoso Lopes
6238c1d102 Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it 
llvm-svn: 109039
 2010-07-21 21:37:59 +00:00
Nate Begeman
784e062b2a Fix a couple issues with Win64 ABI 
1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing

Still to look into:

xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.

llvm-svn: 109035
 2010-07-21 20:49:52 +00:00
Bruno Cardoso Lopes
19b3830142 Avoid AVX instructions to be selected instead of its SSE form 
llvm-svn: 109032
 2010-07-21 20:38:42 +00:00
Rafael Espindola
4277e14dc4 Fix calling convention on ARM if vfp2+ is enabled. 
llvm-svn: 109009
 2010-07-21 11:38:30 +00:00
Eric Christopher
d27913e516 Pulling out previous patch, must've run the tests in 
the wrong directory.

llvm-svn: 109005
 2010-07-21 09:23:56 +00:00
Eric Christopher
b2d1067024 Lower MEMBARRIER on x86 and support processors without SSE2. 
Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.

llvm-svn: 109004
 2010-07-21 09:05:23 +00:00
Bruno Cardoso Lopes
cdbec62510 Add AVX only vzeroall and vzeroupper instructions 
llvm-svn: 109002
 2010-07-21 08:56:24 +00:00
Evan Cheng
a77f3d3b37 Teach bottom up pre-ra scheduler to track register pressure. Work in progress. 
llvm-svn: 108991
 2010-07-21 06:09:07 +00:00
Bruno Cardoso Lopes
3499934da6 Add new AVX vpermilps, vpermilpd and vperm2f128 instructions 
llvm-svn: 108984
 2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes
3ceaf7a0a2 Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it 
llvm-svn: 108983
 2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes
e706501975 Add new AVX vextractf128 instructions 
llvm-svn: 108964
 2010-07-20 23:19:02 +00:00
Chris Lattner
41ff5d4d91 make asmprinter optional, even though passing in null will cause things to explode right now. 
llvm-svn: 108955
 2010-07-20 22:45:33 +00:00
Chris Lattner
b4dc58975b continue pushing dependencies around. 
llvm-svn: 108952
 2010-07-20 22:35:40 +00:00
Chris Lattner
2366d95af9 reduce X86MCInstLower dependencies on asmprinter. 
llvm-svn: 108950
 2010-07-20 22:30:53 +00:00
Chris Lattner
7fbdd7c852 pass around MF, not MMI. 
llvm-svn: 108949
 2010-07-20 22:26:07 +00:00
Chris Lattner
d3f3a89425 cleanups. 
llvm-svn: 108947
 2010-07-20 22:23:57 +00:00
Chris Lattner
5ca516b87c move two asmprinter methods into the asmprinter .cpp file. 
llvm-svn: 108945
 2010-07-20 22:18:19 +00:00
Chris Lattner
cbe9856fce prune #includes a little. 
llvm-svn: 108929
 2010-07-20 21:17:29 +00:00
Bruno Cardoso Lopes
3b505848fd Add new AVX instruction vinsertf128 
llvm-svn: 108892
 2010-07-20 19:44:51 +00:00
Jim Grosbach
3680f70c9d Using BIC for immediates needs an extra bump for its complexity to get 
instruction selection to prefer it when possible. rdar://7903972

llvm-svn: 108844
 2010-07-20 16:07:04 +00:00
Jim Grosbach
9c7708cc1b Removed un-used code. 
llvm-svn: 108841
 2010-07-20 14:51:32 +00:00
Bruno Cardoso Lopes
160695fecb Fix PR7174, a couple o Mips fixes: 
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.

Patch by stetorvs@gmail.com

llvm-svn: 108820
 2010-07-20 08:37:04 +00:00