105 Commits

Author SHA1 Message Date
Kazu Hirata
7cf18ff22b
[LLVMIR] Avoid repeated hash lookups (NFC) (#107428) 2024-09-05 11:43:36 -07:00
Tarun Prabhu
90aac06c7f
[flang][mlir] Add llvm.ident metadata when compiling with flang
This brings the behavior of flang in line with clang which also adds
this metadata unconditionally.

Co-authored-by: Tarun Prabhu <tarun.prabhu@gmail.com>
2024-08-12 11:56:19 -06:00
Ivan R. Ivanov
fbee8d5a65
[MLIR][LLVM] Allow importing of nameless globals (#101918)
LLVM allows nameless globals for private global variables whereas in
MLIR globals must be addressed using symbols. We attach symbols to
nameless globals in order to enable their import.

---------

Co-authored-by: Christian Ulmann <christianulmann@gmail.com>
2024-08-06 11:15:54 +09:00
Kazu Hirata
5262865aac
[mlir] Construct SmallVector with ArrayRef (NFC) (#101896) 2024-08-04 11:43:05 -07:00
Victor Perez
6d2bbba187
[MLIR][LLVM] Attach kernel metadata representation to llvm.func (#101314)
Add optional attributes to `llvm.func` representing LLVM so-called
"kernel" metadata:

-
[`vec_type_hint`](https://clang.llvm.org/docs/AttributeReference.html#vec-type-hint)
-
[`work_group_size_hint`](https://clang.llvm.org/docs/AttributeReference.html#work-group-size-hint)
-
[`reqd_work_group_size`](https://clang.llvm.org/docs/AttributeReference.html#reqd-work-group-size)
-
[`intel_reqd_sub_group_size`](https://clang.llvm.org/docs/AttributeReference.html#intel-reqd-sub-group-size).

---------

Signed-off-by: Victor Perez <victor.perez@codeplay.com>
2024-08-02 11:53:30 +02:00
Finlay
2eea9d6a2d
[mlir] Rename memory attribute to memory_effects in llvmir dialect (#100108)
This commit renames the memory attribute on operations to "memory_effects" to be in line with the naming LLVM IR is using.
2024-07-23 14:17:05 +02:00
Finlay
fde27bd221
[mlir] Added new attributes to the llvm.call op in llvmir target (#99663)
The new attributes are:
 * convergent
 * no_unwind
 * will_return
 * memory effects
2024-07-23 12:44:13 +02:00
Finlay
aa21ee7926
[MLIR] Add attributes no_unwind and will_return to the LLVMIR dialect (#98921)
And testing.
These are being added to be used in the GPU to LLVM SPV pass.

---------

Co-authored-by: Victor Perez <victor.perez@codeplay.com>
2024-07-17 11:26:25 +02:00
Alexis Perry-Holby
f1d3fe7aae
Add basic -mtune support (#98517)
Initial implementation for the -mtune flag in Flang.

This PR is a clean version of PR #96688, which is a re-land of PR #95043
2024-07-16 16:48:24 +01:00
Steffi Stumpos
4a01079931
Expose Tail Kind Call to MLIR (#98080)
I would like to mark a call op in LLVM dialect as Musttail. The calling
convention attribute only exposes Tail, not Musttail. I noticed that the
CallInst of LLVM has an additional field to specify the flavor of tail
call kind. I bubbled this up to the LLVM dialect by adding another
attribute that maps to LLVM::CallInst::TailCallKind.
2024-07-09 14:04:33 -07:00
runseny
e5865ec93c
[MLIR][LLVM] Add ftz and fuse FP ops related function attribute support (#97812)
Adds `denormal-fp-math-f32`, `denormal-fp-math`, `fp-contract` to
llvmFuncOp attributes.

`denormal-fp-math-f32` and `denormal-fp-math` can enable the ftz, that
is , flushing denormal to zero.

`fp-contract` can enable the fma fusion such as `mul + add -> fma`
2024-07-09 09:34:43 +01:00
Finlay
d6df01870a
[MLIR] Add the convergent attribute to LLVM Dialect (#97709)
In order to use the convergent attribute in the GPUToLLVMSPV pass, I've
added the attribute to the LLVM dialect.
Some details on the convergent attribute
https://llvm.org/docs/ConvergentOperations.html#convergent-operations
2024-07-05 09:33:56 +02:00
Tarun Prabhu
8dd9494056
Revert "[flang] Add basic -mtune support" (#96678)
Reverts llvm/llvm-project#95043
2024-06-25 13:25:39 -06:00
Alexis Perry-Holby
a790279bf2
[flang] Add basic -mtune support (#95043)
This PR adds -mtune as a valid flang flag and passes the information
through to LLVM IR as an attribute on all functions. No specific
architecture optimizations are added at this time.
2024-06-25 18:39:35 +01:00
Johannes de Fine Licht
c012e487b7
[MLIR][LLVM] Promote noinline/alwaysinline/optnone out of passthrough (#95110)
The `noinline`, `alwaysinline`, and `optnone` function attributes are
already being used in MLIR code for the LLVM inlining interface and in
some SPIR-V lowering, despite residing in the passthrough dictionary,
which is intended as exactly that -- a pass through MLIR -- and not to
model any actual semantics being handled in MLIR itself.

Promote the `noinline`, `alwaysinline`, and `optnone` attributes out of
the passthrough dictionary on `llvm.func` into first class unit
attributes, updating the import and export accordingly.

Add a verifier to `llvm.func` that checks that these attributes are not
set in an incompatible way according to the LLVM specification.

Update the LLVM dialect inlining interface to use the first class
attributes to check whether inlining is possible.
2024-06-12 08:29:02 +02:00
Jeff Niu
e553ac4d81
[mlir][llvm] Port overflowFlags to a native operation property (RELAND) (#89410)
This PR changes the LLVM dialect's IntegerOverflowFlags to be stored on
operations as native properties.

Reland to fix flang
2024-04-19 09:23:00 -07:00
Christian Ulmann
090d03d1c7
[MLIR][LLVM] Add flag to skip import of DICompositeType's elems (#89355)
This commit introduces a flag to allow skipping the potentially
recursive import of DICompositeType elements. This patch is essentially a
bandaid for the still broken recursive debug type import.

Some of our downstream inputs are produced by excessive usage of
template meta programming, and thus contain tens of thousands of types
that all participate in such recursions. Unfortunately, the series of
patches that introduces type support is not easily revertible due to
being around for a while now and Modular depending on it.

We can consider to revert this change once the type importer has show to
be very performant, but for now we are talking second vs hours to import
specific files.
2024-04-19 14:03:59 +02:00
Valentin Clement (バレンタイン クレメン)
13beabe5e9
Revert "[mlir][llvm] Port overflowFlags to a native operation property" (#89344)
Reverts llvm/llvm-project#89312 as it breaks all flang buildbots
2024-04-18 22:15:42 -07:00
Jeff Niu
0c41eea474
[mlir][llvm] Port overflowFlags to a native operation property (#89312)
This PR changes the LLVM dialect's IntegerOverflowFlags to be stored on
operations as native properties.
2024-04-18 15:35:39 -07:00
Fabian Mora
a2c4b7c8e2
[mlir] Add convertInstruction and getSupportedInstructions to LLVMImportInterface (#86799)
This patch adds the `convertInstruction` and `getSupportedInstructions`
to `LLVMImportInterface`, allowing any non-LLVM dialect to specify how
to import LLVM IR instructions and overriding the default import of LLVM instructions.
2024-04-07 08:46:21 +02:00
Victor Perez
77cbc9bf60
[MLIR][LLVM] Add llvm.experimental.constrained.fptrunc operation (#86260)
Add operation mapping to the LLVM
`llvm.experimental.constrained.fptrunc.*` intrinsic.

The new operation implements the new
`LLVM::FPExceptionBehaviorOpInterface` and
`LLVM::RoundingModeOpInterface` interfaces.

---------

Signed-off-by: Victor Perez <victor.perez@codeplay.com>
2024-03-26 11:02:50 +01:00
Tobias Gysi
335d34d9ea
[MLIR][LLVM] Fix debug intrinsic import (#82637)
This revision handles the case that the translation of a scope fails due
to cyclic metadata. This mainly affects the import of debug intrinsics
that indirectly take such a scope as metadata argument (e.g. via local
variable or label metadata). This commit ensures we drop intrinsics with
such a dependency on cyclic metadata.
2024-02-23 10:30:19 +01:00
Sander de Smalen
d313614b60
[AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (#79166)
Since https://github.com/ARM-software/acle/pull/276 the ACLE
defines attributes to better describe the use of a given SME state.

Previously the attributes merely described the possibility of it being
'shared' or 'preserved', whereas the new attributes have more semantics
and also describe how the data flows through the program.

For ZT0 we already had to add new LLVM IR attributes:
* aarch64_new_zt0
* aarch64_in_zt0
* aarch64_out_zt0
* aarch64_inout_zt0
* aarch64_preserves_zt0

We have now done the same for ZA, such that we add:
* aarch64_new_za       (previously `aarch64_pstate_za_new`)
* aarch64_in_za (more specific variation of `aarch64_pstate_za_shared`)
* aarch64_out_za (more specific variation of `aarch64_pstate_za_shared`)
* aarch64_inout_za (more specific variation of
`aarch64_pstate_za_shared`)
* aarch64_preserves_za (previously `aarch64_pstate_za_shared,
aarch64_pstate_za_preserved`)

This explicitly removes 'pstate' from the name, because with SME2 and
the new ACLE attributes there is a difference between "sharing ZA"
(sharing
the ZA matrix register with the caller) and "sharing PSTATE.ZA" (sharing
either the ZA or ZT0 register, both part of PSTATE.ZA with the caller).
2024-02-01 13:37:37 +00:00
Alex Bradbury
748c295908
[MLIR][LLVM] Add fast-math related function attribute support (#79812)
Adds unsafe-fp-math, no-infs-fp-math, no-nans-fp-math,
approx-func-fp-math, and no-signed-zeros-fp-math function attributes.

This allows code generators using the LLVMIR dialect to match the
codegen of Clang.
2024-01-30 14:03:51 +00:00
Tobias Gysi
9dd0eb9c9c
[mlir][llvm] Drop unreachable basic block during import (#78467)
This revision updates the LLVM IR import to support unreachable basic
blocks. An unreachable block may dominate itself and a value defined
inside the block may thus be used before its definition. The import does
not support such dependencies. We thus delete the unreachable basic
blocks before the import. This is possible since MLIR does not have
basic block labels that can be reached using an indirect call and
unreachable blocks can indeed be deleted safely.

Additionally, add a small poison constant import test.
2024-01-19 11:10:57 +01:00
Sergio Afonso
8fb685fb7e
[MLIR][LLVM] Add explicit target_cpu attribute to llvm.func (#78287)
This patch adds the target_cpu attribute to llvm.func MLIR operations
and updates the translation to/from LLVM IR to match "target-cpu"
function attributes.
2024-01-17 14:55:02 +00:00
Mats Petersson
21e1bf2d00
Add more ZA modes (#77361)
Add more ZA modes
    
 Adds the arm_shared_za and arm_preserves_za attributes to the existing
 arm_new_za attribute. The functionality already exists in LLVM, so just
 "linking the pieces together".
    
For more details see:
https://arm-software.github.io/acle/main/acle.html#sme-attributes-relating-to-za
2024-01-11 18:49:52 +00:00
Tobias Gysi
534034737a
[mlir][llvm] Import call site calling conventions (#76391)
This revision adds support for importing call site calling conventions.
Additionally, the revision also adds a roundtrip test for an indirect
call with a non-standard calling convention.
2024-01-02 14:27:10 +01:00
Paul Walker
dea16ebd26
[LLVM][IR] Replace ConstantInt's specialisation of getType() with getIntegerType(). (#75217)
The specialisation will not be valid when ConstantInt gains native
support for vector types.

This is largely a mechanical change but with extra attention paid to constant
folding, InstCombineVectorOps.cpp, LoopFlatten.cpp and Verifier.cpp to
remove the need to call `getIntegerType()`.

Co-authored-by: Nikita Popov <github@npopov.com>
2023-12-18 11:58:42 +00:00
Tom Eccles
79524ba527
[mlir][ArmSME] Add sve streaming compatible attribute (#75222)
Following the same path already used for ArmStreaming and
ArmLocallyStreaming.

This should correspond to clang's __arm_streaming_compatible attribute.
2023-12-13 13:53:01 +00:00
Tom Eccles
e9e1c411b6
[mlir][LLVM] Add nsw and nuw flags (#74508)
The implementation of these are modeled after the existing fastmath
flags for floating point arithmetic.
2023-12-07 10:35:00 +00:00
Benjamin Maxwell
17de468df1
[mlir][llvm] Add llvm.target_features features attribute (#71510)
This patch adds a target_features (TargetFeaturesAttr) to the LLVM
dialect to allow setting and querying the features in use on a function.

The motivation for this comes from the Arm SME dialect where we would
like a convenient way to check what variants of an operation are
available based on the CPU features.

Intended usage:

The target_features attribute is populated manually or by a pass:

```mlir
func.func @example() attributes {
   target_features = #llvm.target_features<["+sme", "+sve", "+sme-f64f64"]>
} {
 // ...
}
```

Then within a later rewrite the attribute can be checked, and used to
make lowering decisions.

```c++
// Finds the "target_features" attribute on the parent
// FunctionOpInterface.
auto targetFeatures = LLVM::TargetFeaturesAttr::featuresAt(op);

// Check a feature.
// Returns false if targetFeatures is null or the feature is not in
// the list.
if (!targetFeatures.contains("+sme-f64f64"))
    return failure();
```

For now, this is rather simple just checks if the exact feature is in
the list, though it could be possible to extend with implied features
using information from LLVM.
2023-12-05 11:29:31 +00:00
Radu Salavat
3257e4ca16
[MLIR] Add support for frame pointers in MLIR (#72145)
Add support for frame pointers in MLIR.

---------

Co-authored-by: Markus Böck <markus.boeck02@gmail.com>
Co-authored-by: Christian Ulmann <christianulmann@gmail.com>
2023-12-05 11:52:13 +01:00
Justin Wilson
6da578cec1
[mlir] Add support for DIGlobalVariable and DIGlobalVariableExpression (#73367)
This PR introduces DIGlobalVariableAttr and
DIGlobalVariableExpressionAttr so that ModuleTranslation can emit the
required metadata needed for debug information about global variable.
The translator implementation for debug metadata needed to be refactored
in order to allow translation of nodes based on MDNode
(DIGlobalVariableExpressionAttr and DIExpression) in addition to
DINode-based nodes.

A DIGlobalVariableExpressionAttr can now be passed to the GlobalOp
operation directly and ModuleTranslation will create the respective
DIGlobalVariable and DIGlobalVariableExpression nodes. The compile unit
that DIGlobalVariable is expected to be configured with will be updated
with the created DIGlobalVariableExpression.
2023-12-04 15:52:02 +01:00
Benjamin Maxwell
dbb8643333
[mlir][LLVM] Support immargs in LLVM_IntrOpBase intrinsics (#73013)
This extends `LLVM_IntrOpBase` so that it can be passed a list of
`immArgPositions` and a list (of the same length) of `immArgAttrNames`.
`immArgPositions` contains the positions of `immargs` on the LLVM IR
intrinsic, and `immArgAttrNames` maps those to a corresponding MLIR
attribute.

This allows modeling LLVM `immargs` as MLIR attributes, which is the
closest match semantically (and had already been done manually for the
LLVM dialect intrinsics).

This has two upsides:
* It's slightly easier to implement intrinsics with immargs now
(especially if they make use of other features, such as overloads)
* It clearly defines that `immargs` should map to attributes, before
there was no mention of `immargs` in LLVMOpBase.td, so implementing them
was unclear

This works with other features of the `LLVM_IntrOpBase`, so `immargs`
can be marked as overloaded too (which is used in some intrinsics).

As part of this patch (and to test correctness) existing intrinsics have
been updated to use these new parameters.

This also uncovered a few issues with the
`llvm.intr.vector.insert/extract` intrinsics. First, the argument order
for insert did not match the LLVM intrinsic, and secondly, both were
missing a mlirBuilder (so failed to import from LLVM IR). This is
corrected with this patch (and a test case added).
2023-11-23 10:12:12 +00:00
Billy Zhu
0ab6b20c36
[MLIR] Add DIExpression to LLVM dialect (#72462)
Add initial support for DIExpression in LLVM dialect.

Similar to LLVM IR, DI Expression is encoded as a list of uint64. The
difference is that LLVM IR has helpers for understanding the expression
(e.g. for verification and pretty printing), whereas the current support
added by this PR treats the expression elements as opaque.
2023-11-16 11:32:02 -08:00
Benjamin Maxwell
783ac3b6fb
[mlir][ArmSME] Make use of backend function attributes for enabling ZA storage (#71044)
Previously, we were inserting za.enable/disable intrinsics for functions
with the "arm_za" attribute (at the MLIR level), rather than using the
backend attributes. This was done to avoid a dependency on the SME ABI
functions from compiler-rt (which have only recently been implemented).

Doing things this way did have correctness issues, for example, calling
a streaming-mode function from another streaming-mode function (both
with ZA enabled) would lead to ZA being disabled after returning to the
caller (where it should still be enabled). Fixing issues like this would
require re-doing the ABI work already done in the backend within MLIR.

Instead, this patch switches to use the "arm_new_za" (backend) attribute
for enabling ZA for an MLIR function. For the integration tests, this
requires some way of linking the SME ABI functions. This is done via the
`%arm_sme_abi_shlib` lit substitution. By default, this expands to a
stub implementation of the SME ABI functions, but this can be overridden
by providing the `ARM_SME_ABI_ROUTINES_SHLIB` CMake cache variable
(pointing it at an alternative implementation). For now, the ArmSME
integration tests pass with just stubs, as we don't make use of nested
ZA-enabled calls.

A future patch may add an option to compiler-rt to build the SME
builtins into a standalone shared library to allow easily
building/testing with the actual implementation.
2023-11-14 12:50:38 +00:00
David Truby
a72e034f13
[mlir] Add llvm.linker.options operation to the LLVM IR Dialect (#71720)
This patch adds a `llvm.linker.options` operation taking a list of
strings to pass to the linker when the resulting object file is linked.
This is particularly useful on Windows to specify the CRT version to use
for this object file.
2023-11-13 14:13:05 +00:00
Paulo Matos
7b9d73c2f9
[NFC] Remove Type::getInt8PtrTy (#71029)
Replace this with PointerType::getUnqual().
Followup to the opaque pointer transition. Fixes an in-code TODO item.
2023-11-07 17:26:26 +01:00
Michael Liao
97217d1884 [mlir] Fix '-Wunused' warning. NFC 2023-10-16 10:47:01 -04:00
Ivan R. Ivanov
26eb4285b5
[MLIR][LLVM] Add vararg support in LLVM::CallOp and InvokeOp (#67274)
In order to support indirect vararg calls, we need to have information about the
callee type - this patch adds a `callee_type` attribute that holds that.

The attribute is required for vararg calls, else, it is optional and the callee
type is inferred by the operands and results of the operation if not present.

The syntax for non-vararg calls remains the same, whereas for vararg calls, it
is changed to this:

```
llvm.call %p(%arg0, %arg0) vararg(!llvm.func<void (i32, ...)>) : !llvm.ptr, (i32, i32) -> ()
llvm.call @s(%arg0, %arg0) vararg(!llvm.func<void (i32, ...)>) : (i32, i32) -> ()
```
2023-09-28 08:26:45 +02:00
Mats Petersson
5bfd5c60bf
Add support for MLIR to llvm vscale attribute (#67012)
The vscale_range is used for scalabale vector functionality in Arm
Scalable Vector Extension to select the size of vector operation (and I
thnk RISCV has something similar).

This patch adds the base support for the vscale_range attribute to the
LLVM::FuncOp, and the marshalling for translation to LLVM-IR and import
from LLVM-IR to LLVM dialect.

This attribute is intended to be used at higher level MLIR, specified
either by command-line options to the compiler or using compiler
directives (e.g. pragmas or function attributes in the source code) to
indicate the desired range.
2023-09-25 14:32:18 +01:00
Tobias Gysi
85175edd4e
[mlir][llvm] Replace NullOp by ZeroOp (#67183)
This revision replaces the LLVM dialect NullOp by the recently
introduced ZeroOp. The ZeroOp is more generic in the sense that it
represents zero values of any LLVM type rather than null pointers only.

This is a follow to https://github.com/llvm/llvm-project/pull/65508
2023-09-25 11:11:52 +02:00
Lukas Sommer
93e0658a83
[mlir][llvm] Use zeroinitializer for TargetExtType (#66510)
Use the recently introduced llvm.mlir.zero operation for values with
LLVM target extension type. Replaces the previous workaround that uses a
single zero-valued integer attribute constant operation.

Signed-off-by: Lukas Sommer <lukas.sommer@codeplay.com>
2023-09-18 17:49:36 +02:00
Anton Korobeynikov
51d5d7bbae
Extend retcon.once coroutines lowering to optionally produce a normal result (#66333)
One of the main user of these kind of coroutines is swift. There yield-once (`retcon.once`) coroutines are used to temporary "expose" pointers to internal fields of various objects creating borrow scopes.

However, in some cases it might be useful also to allow these coroutines to produce a normal result, but there is no convenient way to represent this (as compared to switched-resume kind of coroutines where C++ `co_return`
is transformed to a member / callback call on promise object).

The extension is simple: we allow continuation function to have a non-void result and accept optional extra arguments via a special `llvm.coro.end.result` intrinsic that would essentially forward them as normal results.
2023-09-15 09:54:38 -07:00
Christian Ulmann
667a195fcd [mlir][LLVM] Fix dbg intrinsic import of killed locations
This commit ensures that debug intrinsics of killed variables do not
cause a crash of the importer. Killed locations are usually undef
constants, but in infrequent cases can also be metadata nodes, which
caused problems.

Reviewed By: zero9178

Differential Revision: https://reviews.llvm.org/D157724
2023-08-14 06:30:45 +00:00
Christian Ulmann
b808648ac1 [mlir][LLVM] Delay debug intrinsic import to ensure dominance
This commit ensures that debug intrinsics are imported after all other
instructions of a function were imported.

Debug intrinsics in LLVM are excluded from the define-before-use
invariant, i.e., they can reference SSA values that do not dominate
them. So far, we had implemented checks to stop the import of such
intrinsics, but there were always additional cases that were not
covered (the latest being terminators that define such used values).

Reviewed By: gysit, zero9178

Differential Revision: https://reviews.llvm.org/D157496
2023-08-09 13:03:45 +00:00
Tobias Gysi
0fc8d9e41a [mlir][llvm] Remove the metadata op
This revision removes the metadata op, that to the best of our
knowledge, has no more uses after switching to a purely attribute based
metadata representation:
https://reviews.llvm.org/D155444
https://reviews.llvm.org/D155285
https://reviews.llvm.org/D155159
These changes got unlocked after landing distinct attribute support:
https://reviews.llvm.org/D153360,
which enables modeling distinct metadata using attributes. As a result,
all metadata kinds are now represented using attributes. Previously,
there has been a mix of attribute and op based representations.

Having attribute only metadata makes it possible to update the metadata
in-parallel, while updating the global metadata operation has been
a sequential process. The LLVM Dialect inliner already benefits from
this change and now creates new alias scopes and domains during
inlining rather than dropping the no alias information:
https://reviews.llvm.org/D155712

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D156217
2023-07-26 11:42:52 +00:00
Markus Böck
1dda134f85 [mlir][flang] Convert TBAA metadata to an attribute representation
The current representation of TBAA is the very last in-tree user of the `llvm.metadata` operation.
Using ops to model metadata has a few disadvantages:
* Building a graph has to be done through some weakly typed indirection mechanism such as `SymbolRefAttr`
* Creating the metadata has to be done through a builder within a metadata op.
* It is not multithreading safe as operation insertion into the same block is not thread-safe

This patch therefore converts TBAA metadata into an attribute representation, in a similar manner as it has been done for alias groups and access groups in previous patches.

This additionally has the large benefit of giving us more "correctness by construction" as it makes things like cycles in a TBAA graph, or references to an incorrectly typed metadata node impossible.

Differential Revision: https://reviews.llvm.org/D155444
2023-07-19 16:42:50 +02:00
Markus Böck
9170fa5808 [mlir][LLVM] Convert access group metadata to using attributes instead of ops
Using MLIR attributes instead of metadata has many advantages:
* No indirection: Attributes can simply refer to each other seemlessly without having to use the indirection of `SymbolRefAttr`. This also gives us correctness by construction in a lot of places as well
* Multithreading safe: The Attribute infrastructure gives us thread-safety for free. Creating operations and inserting them into a block is not thread-safe. This is a major use case for e.g. the inliner in MLIR which runs in parallel
* Easier to create: There is no need for a builder or a metadata region

This patch therefore does exactly that. It leverages the new distinct attributes to create distinct access groups in a deterministic and threadsafe manner.

Differential Revision: https://reviews.llvm.org/D155285
2023-07-14 14:57:46 +02:00