9 Commits

Author SHA1 Message Date
AtariDreams
16e05919d9
[AArch64] Use isKnownNonZero to optimize eligible compares to cmn and ccmn (#96349)
The problematic case for unsigned comparisons occurs only when the
second argument is zero.

The problematic case for signed comparisons occurs only when the second
argument is the signed minimum value.

We can use KnownBits to know when we don't have to worry about this.

Source: https://devblogs.microsoft.com/oldnewthing/20210607-00/?p=105288
2024-07-22 11:04:08 +01:00
AtariDreams
4e6835d4d9
[AArch64] Use ccmn to compare negative immediates between -1 and -31 (#95825)
Because ccmn is like a + b, it works when using cmp but with values that
when negated are in the range of 1 through 31
2024-06-21 15:48:04 +01:00
Owen Anderson
ebb64d8370
[GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (#82733)
This is needed because the binary operators (G_OR and G_AND) do
not have the poison-suppressing semantics of G_SELECT.

Fixes https://github.com/llvm/llvm-project/issues/72475
2024-02-26 10:50:37 -05:00
Harvin Iriawan
db158c7c83 [AArch64] Update generic sched model to A510
Refresh of the generic scheduling model to use A510 instead of A55.
  Main benefits are to the little core, and introducing SVE scheduling information.
  Changes tested on various OoO cores, no performance degradation is seen.

  Differential Revision: https://reviews.llvm.org/D156799
2023-08-21 12:25:15 +01:00
David Green
6a353c7756 [AArch64] Add GPR rr instructions to isAssociativeAndCommutative
This adds some more scalar instructions that are both associative and
commutative to isAssociativeAndCommutative, allowing the machine
combiner to reassociate them to reduce critical path length.

Differential Revision: https://reviews.llvm.org/D134260
2022-11-27 12:53:10 +00:00
Vitaly Buka
8f104b806a Revert "[AArch64] Add GPR rr instructions to isAssociativeAndCommutative"
Breaks msan on aarch64.

This reverts commit 5f7f484ee54ebbf702ee4c5fe9852502dc237121.
2022-11-22 11:03:13 -08:00
David Green
5f7f484ee5 [AArch64] Add GPR rr instructions to isAssociativeAndCommutative
This adds some more scalar instructions that are both associative and
commutative to isAssociativeAndCommutative, allowing the machine
combiner to reassociate them to reduce critical path length.

Differential Revision: https://reviews.llvm.org/D134260
2022-11-16 12:39:13 +00:00
David Green
6ff873ac86 [AArch64] Add some extra GlobalISel CCMP tests coverage. NFC 2022-08-04 20:52:26 +01:00
Karl Meakin
43a0016f3d Extend performANDCSELCombine to performANDORCSELCombine
Differential Revision: https://reviews.llvm.org/D120422
2022-03-04 15:09:59 +00:00