17 Commits

Author SHA1 Message Date
Sumanth Gundapaneni
4c9e14b3ad
[AMDGPU] Update PromoteAlloca to handle GEPs with variable offset. (#122342)
In case of variable offset of a GEP that can be optimized out, promote
alloca is updated to use the refereshed index to avoid an assertion.

Issue found by fuzzer.

---------

Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
2025-02-24 13:36:30 -06:00
Paul Walker
38fffa630e
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548) 2024-11-06 11:53:33 +00:00
Nikita Popov
00a4e248dc [AMDGPU] Convert tests to opaque pointers (NFC) 2024-02-05 12:42:23 +01:00
Alex Richardson
e39f6c1844 [opt] Infer DataLayout from triple if not specified
There are many tests that specify a target triple/CPU flags but no
DataLayout which can lead to IR being generated that has unusual
behaviour. This commit attempts to use the default DataLayout based
on the relevant flags if there is no explicit override on the command
line or in the IR file.

One thing that is not currently possible to differentiate from a missing
datalayout `target datalayout = ""` in the IR file since the current
APIs don't allow detecting this case. If it is considered useful to
support this case (instead of passing "-data-layout=" on the command
line), I can change IR parsers to track whether they have seen such a
directive and change the callback type.

Differential Revision: https://reviews.llvm.org/D141060
2023-10-26 12:07:37 -07:00
pvanhout
3890a3b113 [AMDGPU] Use SSAUpdater in PromoteAlloca
This allows PromoteAlloca to not be reliant on a second SROA run to remove the alloca completely. It just does the full transformation directly.

Note PromoteAlloca is still reliant on SROA running first to
canonicalize the IR. For instance, PromoteAlloca will no longer handle aggregate types because those should be simplified by SROA before reaching the pass.

Reviewed By: #amdgpu, arsenm

Differential Revision: https://reviews.llvm.org/D152706
2023-07-25 07:44:47 +02:00
pvanhout
7007b99340 Revert "[AMDGPU] Use SSAUpdater in PromoteAlloca"
This reverts commit 091bfa76db64fbe96d0e53d99b2068cc05f6aa16.
2023-06-28 11:14:17 +02:00
pvanhout
091bfa76db [AMDGPU] Use SSAUpdater in PromoteAlloca
This allows PromoteAlloca to not be reliant on a second SROA run to remove the alloca completely. It just does the full transformation directly.

Note PromoteAlloca is still reliant on SROA running first to
canonicalize the IR. For instance, PromoteAlloca will no longer handle aggregate types because those should be simplified by SROA before reaching the pass.

Reviewed By: #amdgpu, arsenm

Differential Revision: https://reviews.llvm.org/D152706
2023-06-28 08:12:22 +02:00
Ruiling Song
5d0ff923c3 AMDGPU: Promote array alloca if used by memmove/memcpy
Reviewed by: arsenm

Differential Revision: https://reviews.llvm.org/D140599
2023-01-11 09:59:35 +08:00
Matt Arsenault
687e0e205e AMDGPU: Create alloca wide load/store with explicit alignment
This was introducing transient UB by using the default alignment of a
larger vector type.
2023-01-03 11:29:18 -05:00
Matt Arsenault
50caf6936b AMDGPU: Convert promote alloca tests to opaque pointers 2022-11-28 10:36:38 -05:00
Matt Arsenault
c1710e7779 AMDGPU: Use modern address spaces in some tests
This was way out of date, still using 4 for generic and 0 for private.
2022-11-28 10:05:06 -05:00
Matt Arsenault
1310aa1688 AMDGPU: Use -passes for amdgpu-promote-alloca tests 2022-11-16 17:14:48 -08:00
Nikita Popov
3ed643ea76 [AMDGPUPromoteAlloca] Make compatible with opaque pointers
This mainly changes the handling of bitcasts to not check the types
being casted from/to -- we should only care about the actual
load/store types. The GEP handling is also changed to not care about
types, and just make sure that we get an offset corresponding to
a vector element.

This was a bit of a struggle for me, because this code seems to be
pretty sensitive to small changes. The end result seems to produce
strictly better results for the existing test coverage though,
because we can now deal with more situations involving bitcasts.

Differential Revision: https://reviews.llvm.org/D121371
2022-03-11 09:20:51 +01:00
Nikita Popov
eaac3484ab [AMDGPU] Regenerate test checks (NFC)
Also rename variables to avoid file check clash.
2022-03-10 11:32:45 +01:00
Matt Arsenault
37ab4cf8b8 AMDGPU: Fix assert on alloca of array of struct
llvm-svn: 313282
2017-09-14 18:02:29 +00:00
Simon Pilgrim
337b2d007a Fix line endings. NFCI.
llvm-svn: 313247
2017-09-14 10:30:54 +00:00
David Stuttard
82618baa0f [AMDGPU] Fix for issue in alloca to vector promotion pass
Summary:
Alloca promotion pass not dealing with non-canonical input

Added some additional checks so the pass simply backs-off forms it can't deal with (non-canonical)

Also added some test cases in non-canonical form to check that it no longer crashes

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D31710

llvm-svn: 305079
2017-06-09 14:16:22 +00:00