65 Commits

Author SHA1 Message Date
Noah Goldstein
809b1d834d [KnownBits] Return 0 for poison {s,u}div inputs
It seems consistent to always return zero for known poison rather than
varying the value. We do the same elsewhere.

Differential Revision: https://reviews.llvm.org/D150922
2023-06-06 15:14:10 -05:00
Noah Goldstein
8b2767f257 [KnownBits] Cleanup some misspelling / logic in {u,s}div
Chronically misspelled 'denominator' as 'denuminator' and a few other
cases.

On the logic side, no longer require `RHS` to be strictly positive in
`sdiv`. This in turn means we need to handle a possible zero `denom`
in the APInt division.

Differential Revision: https://reviews.llvm.org/D150921
2023-06-06 15:14:10 -05:00
Nikita Popov
dfb369399d [ValueTracking] Directly use KnownBits shift functions
Make ValueTracking directly call the KnownBits shift helpers, which
provides more precise results.

Unfortunately, ValueTracking has a special case where sometimes we
determine non-zero shift amounts using isKnownNonZero(). I have my
doubts about the usefulness of that special-case (it is only tested
in a single unit test), but I've reproduced the special-case via an
extra parameter to the KnownBits methods.

Differential Revision: https://reviews.llvm.org/D151816
2023-06-01 09:46:16 +02:00
Nikita Popov
103684b8e8 [KnownBits] Partially synchronize shift implementations (NFC)
And remove some bits of effectively dead code.
2023-05-26 14:16:14 +02:00
Nikita Popov
6f75c6681d [KnownBits] Add fast-path for shl with unknown shift amount (NFC)
We currently don't call into KnownBits::shl() from ValueTracking
if the shift amount is unknown. If we do try to do so, we get
significant compile-time regressions, because evaluating all 64
shift amounts if quite expensive, and mostly pointless in this case.
Add a fast-path for the case where the shift amount is the full
[0, BitWidth-1] range. This primarily requires a more accurate
estimate of the max shift amount, to avoid taking the fast-path in
too many cases.

Differential Revision: https://reviews.llvm.org/D151540
2023-05-26 13:57:33 +02:00
Jay Foad
2b1678cd06 [KnownBits] Simplify shl. NFCI.
Differential Revision: https://reviews.llvm.org/D151421
2023-05-25 16:05:32 +01:00
Nikita Popov
d2502eb091 [KnownBits] Add support for nuw/nsw on shifts
Implement precise nuw/nsw support in the KnownBits implementation,
replacing the rather crude handling in ValueTracking.

Differential Revision: https://reviews.llvm.org/D151208
2023-05-25 10:17:10 +02:00
Nikita Popov
725fcf40c3 [KnownBits] Reduce number of overflow checks for uadd/sub_sat (NFCI)
Only check for overflow on the min/max values, don't also check
for predicates in addition to that.
2023-05-24 11:16:58 +02:00
Nikita Popov
2d48a771fc [KnownBits] Use early return for unknown LHS for shifts (NFC)
Make it clear that the leading/trailing zeros handling is only
relevant for the unknown LHS case, which is a fast path to avoid
the full shift amount loop in cases where it would not produce
better results.
2023-05-24 11:02:16 +02:00
Nikita Popov
d4bfc144ea [KnownBits] Check for conflict-freedom in exhaustive tests
And make sure udiv() Exact does not produce conflicts.
2023-05-24 10:34:44 +02:00
Noah Goldstein
5f50b180c5 [KnownBits] Add implementations for saturating add/sub functions
These where previously missing. Even in the case where overflow is
indeterminate we can still deduce some of the low/high bits.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D150102
2023-05-23 13:52:40 -05:00
Noah Goldstein
4fd3401e76 [KnownBits] Improve implementation of KnownBits::abs
`abs` preserves the lowest set bit, so if we know the lowest set bit,
set it in the output.

As well, implement the case where the operand is known negative.

Reviewed By: foad, RKSimon

Differential Revision: https://reviews.llvm.org/D150100
2023-05-23 13:52:39 -05:00
Nikita Popov
f7d1baa414 [KnownBits] Return zero instead of unknown for always poison shifts
For always poison shifts, any KnownBits return value is valid.
Currently we return unknown, but returning zero is generally more
profitable. We had some code in ValueTracking that tried to do this,
but was actually dead code.

Differential Revision: https://reviews.llvm.org/D150648
2023-05-23 14:41:22 +02:00
Noah Goldstein
7d05ab99ed [KnownBits] Improve KnownBits::udiv
We can more precisely determine the upper bits doing `MaxNum /
MinDenum` as opposed to only using the MSB.

As well, if the `exact` flag is set, we can sometimes determine some
of the low-bits.

Differential Revision: https://reviews.llvm.org/D150094
2023-05-16 18:58:12 -05:00
Noah Goldstein
8c569c922b [KnownBits] Add implementation for KnownBits::sdiv
Can figure out some of the upper bits (similiar to `udiv`) if we know
the sign of the inputs.

As well, if we have the `exact` flag we can sometimes determine some
low-bits.

Differential Revision: https://reviews.llvm.org/D150093
2023-05-16 18:58:12 -05:00
Nikita Popov
0b81ff3ac5 [KnownBits] Handle shifts over wide types
Do not assert if the bit width is larger than 64 bits. This case
is currently hidden from the IR layer by other checks, but gets
exposed with future changes.
2023-05-16 11:26:39 +02:00
Jay Foad
d8229e2f14 [KnownBits] Define and use intersectWith and unionWith
Define intersectWith and unionWith as two complementary ways of
combining KnownBits. The names are chosen for consistency with
ConstantRange.

Deprecate commonBits as a synonym for intersectWith.

Differential Revision: https://reviews.llvm.org/D150443
2023-05-16 09:23:51 +01:00
Nikita Popov
9d73a8bdc6 [KnownBits] Make shl/lshr/ashr implementations optimal
The implementations for shifts were suboptimal in the case where
the max shift amount was >= bitwidth. In that case we should still
use the usual code clamped to BitWidth-1 rather than just giving up
entirely.

Additionally, there was an implementation bug where the known zero
bits for the individual shift amounts were not set in the shl/lshr
implementations. I think after these changes, we'll be able to drop
some of the code in ValueTracking which *also* evaluates all possible
shift amounts and has been papering over this issue.

For the "all poison" case I've opted to return an unknown value for
now. It would be better to return zero, but this has fairly
substantial test fallout, so I figured it's best to not mix it into
this change. (The "correct" return value would be a conflict, but
given that a lot of our APIs assert conflict-freedom, that's probably
not the best idea to actually return.)

Differential Revision: https://reviews.llvm.org/D150587
2023-05-16 09:44:26 +02:00
Nikita Popov
0f1fb626b3 [KnownBitsTest] Align with ConstantRange test infrastructure (NFC)
Align the way we perform exhaustive tests for KnownBits with what
we do for ConstantRange. Test each case separately by specifying
a function on KnownBits and one on APInts. Additionally, specify
a callback that determines which cases are supposed to be optimal,
rather than only correct. Unlike the ConstantRange case there is
a well-defined, unique notion of optimality for KnownBits.

If a failure occurs, print out the inputs, computed result and
exact result. Adjust the printing function to produce the output
in a format that is meaningful for KnownBits, i.e. print the
actual known bits, using ? to signify unknowns and ! to signify
conflicts.
2023-05-15 16:48:57 +02:00
Noah Goldstein
7770b0abfd [KnownBits] Improve KnownBits::rem(X, Y) in cases where we can deduce low-bits of output
The first `cttz(Y)` bits in `X` are translated 1-1 in the output.

Alive2 Links:
    https://alive2.llvm.org/ce/z/Qc47p7
    https://alive2.llvm.org/ce/z/19ut5H

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D149421
2023-05-07 19:11:53 -05:00
Kazu Hirata
f8f3db2756 Use APInt::count{l,r}_{zero,one} (NFC) 2023-02-19 22:04:47 -08:00
Jay Foad
6749d187c6 [KnownBits] Add blsi and blsmsk
Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D142519
2023-02-18 13:31:07 -06:00
Fangrui Song
b1df3a2c0b [Support] llvm::Optional => std::optional
https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-16 08:49:10 +00:00
Kazu Hirata
aadaaface2 [llvm] Use std::nullopt instead of None (NFC)
This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated.  The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716
2022-12-02 21:11:44 -08:00
Kazu Hirata
7a47ee51a1 [llvm] Don't use Optional::getValue (NFC) 2022-06-20 22:45:45 -07:00
Nikita Popov
a694546f7c [KnownBits] Add operator==
Checking whether two KnownBits are the same is somewhat common,
mainly in test code.

I don't think there is a lot of room for confusion with "determine
what the KnownBits for an icmp eq would be", as that has a
different result type (this is what the eq() method implements,
which returns Optional<bool>).

Differential Revision: https://reviews.llvm.org/D125692
2022-05-17 09:38:13 +02:00
Simon Pilgrim
94453952fc [KnownBits] Add support for X*X self-multiplication (update)
Rename the SelfMultiply argument to make it clearer that the argument must not be undef

Differential Revision: https://reviews.llvm.org/D108992
2022-02-06 19:40:08 +00:00
Sanjay Patel
892c731681 [Support] improve known bits analysis for leading zeros of multiply
Instead of summing leading zeros on the input operands, multiply the
max possible values of those inputs and count the leading zeros of
the result. This can give us an extra zero bit (typically in cases
where one of the operands is a known constant).

This allows folding away the remaining 'add' ops in the motivating
bug (modeled in the PhaseOrdering IR test):
https://github.com/llvm/llvm-project/issues/48399

Fixes #48399

Differential Revision: https://reviews.llvm.org/D115969
2021-12-20 09:10:50 -05:00
Sanjay Patel
e9179a6a02 [Support] improve known bits analysis for multiply by power-of-2 (1 set bit)
This can be viewed as recognizing that multiply-by-power-of-2 doesn't
have a carry into the top bit of an M-bit * N-bit number.

Enhancing canonicalization of mul -> select might also handle some of
these if we were ok with increasing instruction count with casts in
some cases.

This doesn't help https://llvm.org/PR49055 , but it's a simpler
pattern that we miss.
Note: "-sccp" already gets these examples using a constant
range analysis.

Differential Revision: https://reviews.llvm.org/D114962
2021-12-08 11:50:05 -05:00
Sanjay Patel
aea6b9dcee [Support] replace check with assert in known bits of mul calculation; NFC 2021-12-01 13:41:12 -05:00
Jay Foad
a9bceb2b05 [APInt] Stop using soft-deprecated constructors and methods in llvm. NFC.
Stop using APInt constructors and methods that were soft-deprecated in
D109483. This fixes all the uses I found in llvm, except for the APInt
unit tests which should still test the deprecated methods.

Differential Revision: https://reviews.llvm.org/D110807
2021-10-04 08:57:44 +01:00
Simon Pilgrim
0a07ae6ebf [KnownBits] Add support for X*X self-multiplication
Add KnownBits handling and unit tests for X*X self-multiplication cases which guarantee that bit1 of their results will be zero - see PR48683.

https://alive2.llvm.org/ce/z/NN_eaR

The next step will be to add suitable test coverage so this can be enabled in ValueTracking/DAG/GlobalISel - currently only a single Analysis/ScalarEvolution test is affected.

Differential Revision: https://reviews.llvm.org/D108992
2021-09-07 11:43:45 +01:00
Simon Pilgrim
ddbb58736a [KnownBits] Rename KnownBits::computeForMul to KnownBits::mul. NFCI.
As promised in D98866
2021-04-06 10:11:41 +01:00
Philip Reames
115a42ad1e Add debug printers for KnownBits [nfc] 2021-03-31 15:36:07 -07:00
Simon Pilgrim
a96897219d [KnownBits] Add knownbits analysis for mulhs/mulu 'multiply high' instructions
Split off from D98857

https://reviews.llvm.org/D98866
2021-03-19 08:56:06 +00:00
Simon Pilgrim
c2d18d7005 [KnownBits] Add min/max shift amount handling to shl/lshr/ashr KnownBits helpers
Pulled out of the original D90479 patch - also includes the "impossible shift amount" filtering from computeKnownBitsFromShiftOperator.

Differential Revision: https://reviews.llvm.org/D90479
2021-03-08 11:44:31 +00:00
Simon Pilgrim
96a3dfeb93 Revert rGd65ddca83ff85c7345fe9a0f5a15750f01e38420 - "[ValueTracking] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526)"
This is causing sanitizer test failures that I haven't been able to fix yet.
2021-02-24 18:03:17 +00:00
Simon Pilgrim
d65ddca83f [ValueTracking] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526)
Followup to D72573 - as detailed in https://blog.regehr.org/archives/1709 we don't make use of the known leading/trailing zeros for shifted values in cases where we don't know the shift amount value.

Stop ValueTracking returning zero for poison shift patterns and use the KnownBits shift helpers directly.

Extend KnownBits::shl to combine all possible shifted combinations if both min/max shift amount values are in range.

Differential Revision: https://reviews.llvm.org/D90479
2021-02-24 12:15:45 +00:00
Simon Pilgrim
bb20cf2f1c [KnownBits] Pull out repeated getMinValue() calls from shift analysis. NFCI. 2021-02-22 18:41:01 +00:00
Craig Topper
183bbad1d7 [KnownBits][RISCV] Improve known bits for srem.
The result must be less than or equal to the LHS side, so any
leading zeros in the left hand side must also exist in the result.
This is stronger than the previous behavior where we only considered
the sign bit being 0.

The affected test case used the sign bit being known 0 to change
a sign extend to a zero extend pre type legalization. After type
legalization the types were promoted to i64, but we no longer
knew bit 31 was zero. This shifts are are the equivalent of an
AND with 0xffffffff or zext_inreg X, i32. This patch allows us to
see that bit 31 is zero and remove the shifts.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D97124
2021-02-21 14:48:29 -08:00
Simon Pilgrim
c0939fddf8 [Support] Simplify KnownBits::sextInReg implementation.
As noted by @foad in rG9cf4f493a72f all we need to do is sextInReg both KnownBits One and Zero.
2021-01-14 15:14:32 +00:00
Simon Pilgrim
0b46f19a9e [Support] Ensure KnownBits::sextInReg can handle the src == dst sext-in-reg case.
This was resulting in assertions inside APInt::zext that we were extending to the same bitwidth.
2021-01-14 14:50:21 +00:00
Jay Foad
90b310f6ca [Support] Simplify KnownBits::icmp helpers. NFC.
Remove some special cases that aren't really any simpler than the
general case.

Differential Revision: https://reviews.llvm.org/D94595
2021-01-14 14:02:43 +00:00
Simon Pilgrim
23b4198652 [Support] Add KnownBits::icmp helpers.
Check if all possible values for a pair of knownbits give the same icmp result - these are based off the checks performed in InstCombineCompares.cpp and D86578.

Add exhaustive unit test coverage - a followup will update InstCombineCompares.cpp to use this.
2021-01-04 12:46:27 +00:00
Simon Pilgrim
9cf4f493a7 [DAG] Move SelectionDAG implementation to KnownBits::setInReg(). NFCI. 2020-12-04 18:09:08 +00:00
Nikita Popov
9a85643cd3 [KnownBits] Combine abs() implementations
ValueTracking was using a more powerful abs() implementation. Roll
it into KnownBits::abs(). Also add an exhaustive test for abs(),
in both the poisoning and non-poisoning variants.
2020-11-13 22:23:50 +01:00
Simon Pilgrim
27e9f0f95e [KnownBits] Merge the minimum shift amount and leading/trailing shift value bits handling.
By starting with the source shift value minimum leading/trailing bits, we can then add the minimum known shift amount to more accurately predict the minimum leading/trailing bits of the result.

This is currently only covered by the exhaustive unit tests in KnownBitsTests.cpp, but will help with some of the regressions encountered in D90479 (PR44526).
2020-11-13 16:40:20 +00:00
Simon Pilgrim
1a62ca65c1 [KnownBits] Add KnownBits::commonBits helper. NFCI.
We have a frequent pattern where we're merging two KnownBits to get the common/shared bits, and I just fell for the gotcha where I tried to use the & operator to merge them........
2020-11-11 12:15:54 +00:00
Simon Pilgrim
6729b6de1f [KnownBits] Move ValueTracking SREM KnownBits handling to KnownBits::srem. NFCI.
Move the ValueTracking implementation to KnownBits, the SelectionDAG version is more limited so I'm intending to replace that as a separate commit.
2020-11-05 14:58:33 +00:00
Simon Pilgrim
e237d56b43 [KnownBits] Move ValueTracking/SelectionDAG UREM KnownBits handling to KnownBits::urem. NFCI.
Both these have the same implementation - so move them to a single KnownBits copy.

GlobalISel will be able to use this as well with minimal effort.
2020-11-05 14:30:59 +00:00