3 Commits

Author SHA1 Message Date
Chaitanya
83451d8d4d
[CIR][AMDGPU] Add AMDGPU-specific function attributes for HIP kernels (#188007)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2091

This patch adds support for AMDGPU-specific function attributes for HIP
kernels

Added setTargetAttributes for AMDGPUTargetCIRGenInfo to set kernel
attributes
Added generic string attribute handler in amendFunction to translate
string-values with "cir." prefix function attributes to LLVM function
attributes
Follows OGCG AMDGPU implementation from
"clang/lib/CodeGen/Targets/AMDGPU.cpp".
2026-03-27 11:54:29 +05:30
Chaitanya
a4f97f0d90
[CIR][AMDGPU] Add module flags for AMDGPU target using amendOperation of CIRDialectLLVMIRTranslationInterface (#186073)
Add the amendOperation override to handle CIR dialect attributes during
MLIR-to-LLVM IR translation. This dispatches to  amendModule for ModuleOp,
enabling module metadata.

This PR also adds support to emit AMDGPU-specific module flags
amdhsa_code_object_version and amdgpu_printf_kind to match OGCG
behavior.

In CIRGenModule, the flags are stored as CIR module attributes:

cir.amdhsa_code_object_version (integer)
cir.amdgpu_printf_kind (string: "hostcall" or "buffered")
During lowering to LLVM IR (in LowerToLLVMIR.cpp), these attributes are
converted to LLVM module flags.

Upstreaming basic changes from clangIR PRs: 

61e9ebd9f8
https://github.com/llvm/clangir/pull/768
https://github.com/llvm/clangir/pull/773
https://github.com/llvm/clangir/pull/2100
2026-03-20 12:20:42 +05:30
Andy Kaylor
701148f05a
[CIR] Upstream initial support for CIR flattening (#130648)
The ClangIR CFG has to be flat before it can be lowered to LLVM IR. That
is, there can be no nested regions and all blocks in a region must
belong to the parent region. Currently only cir.scope operations violate
these rules, so the initial implementation of the cir-flatten-cfg pass
only has to transform scope operations.
2025-03-11 15:47:02 -07:00