626 Commits

Author SHA1 Message Date
Thurston Dang
30d8f69de9
[msan][NFCI] Generalize handlePairwiseShadowOrIntrinsic to have shards (#167954)
This will allow fixing up the handling of AVX2 phadd/phsub instructions
in a future patch, by setting Shards = 2.

Currently, the extra functionality is not used.
2025-11-13 20:51:50 -08:00
Thurston Dang
f6004aea30
[msan] Support x86_avx512bf16_dpbf16ps (#166862)
Use the generalized handleVectorPmaddIntrinsic(), but multiplication by
an initialized zero does not guarantee that the result is zero
(counter-example: multiply zero by NaN).
2025-11-13 20:51:15 -08:00
Thurston Dang
cdf52a1325
[msan][NFCI] Generalize handleVectorPmaddIntrinsic() (#166282)
This generalizes `handleVectorPmaddIntrinsic()`:
- potentially handle floating-point type intrinsics (e.g.,
`llvm.x86.avx512bf16.dpbf16ps.512`). This usage is not enabled yet.
- "multiplication with an initialized zero guarantees that the
corresponding output becomes initialized" is now gated by a parameter
2025-11-04 19:52:25 -08:00
Yi-Chi Lee
964b4abe6c
[Instrumentation] Fix typos across files in Transforms/Instrumentation (#165251)
Closes #165240.
2025-10-27 16:23:45 +01:00
Thurston Dang
b6e6a4dc6d
[msan] Convert target("aarch64.svcount") from compile-time crash to MSan false negatives (#165028)
MSan currently crashes at compile-time when it encounters
target("aarch64.svcount") (e.g.,
https://github.com/llvm/llvm-project/pull/164315). This patch duct-tapes
MSan so that it won't crash at compile-time, and instead propagates a
clean shadow (resulting in false negatives but not false positives).
2025-10-24 14:03:08 -07:00
Nikita Popov
573ca36753
[IR] Replace alignment argument with attribute on masked intrinsics (#163802)
The `masked.load`, `masked.store`, `masked.gather` and `masked.scatter`
intrinsics currently accept a separate alignment immarg. Replace this
with an `align` attribute on the pointer / vector of pointers argument.

This is the standard representation for alignment information on
intrinsics, and is already used by all other memory intrinsics. This
means the signatures now match llvm.expandload, llvm.vp.load, etc.
(Things like llvm.memcpy used to have a separate alignment argument as
well, but were already migrated a long time ago.)

It's worth noting that the masked.gather and masked.scatter intrinsics
previously accepted a zero alignment to indicate the ABI type alignment
of the element type. This special case is gone now: If the align
attribute is omitted, the implied alignment is 1, as usual. If ABI
alignment is desired, it needs to be explicitly emitted (which the
IRBuilder API already requires anyway).
2025-10-20 08:50:09 +00:00
Nikita Popov
a4767e63ee
[MemorySanitizer] Use getelementptr instead of ptrtoint+add+inttoptr (#161392)
MemorySanitizer currently does a lot of pointer arithmetic using
ptrtoint+add+inttoptr instead of using getelementptr. As far as I can
tell, there is no need to use this pattern -- msan is not trying to
synthesize pointers with different provenance here. The pointers in
question stay within one object (like the TLS parameter area).

I suspect that this is just a leftover from pre-opaque-pointer types
where this was a natural way to perform offset arithmetic. Nowadays we
should just emit a getelementptr i8, aka ptradd.
2025-10-02 09:16:08 +02:00
BaiXilin
0d9dd60815
[x86][AVX-VNNI] Fix VPDPBXXD Argument Type (#159222)
Fixed intrinsic VPDP[SS,SU,UU]D[,S]_128/256/512's argument types to match with the ISA.
Fixes part of #97271.
2025-09-30 09:41:12 +00:00
Thurston Dang
7ad70d2793
[msan] Handle AVX512/AVX10 vrndscale (#160624)
Uses the updated handleAVX512VectorGenericMaskedFP() from
https://github.com/llvm/llvm-project/pull/159966
2025-09-25 17:59:05 -07:00
Thurston Dang
475e0ee7fa
[msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP() operands (#159966)
This generalizes handleAVX512VectorGenericMaskedFP() (introduced in
#158397), to potentially handle intrinsics that have A/WriteThru/Mask in
an operand order that is different to AVX512/AVX10 rcp and rsqrt. Any
operands other than A and WriteThru must be fully initialized.

For example, the generalized handler could be applied in follow-up work
to many of the AVX512 rndscale intrinsics:
```
<32 x half> @llvm.x86.avx512fp16.mask.rndscale.ph.512(<32 x half>, i32, <32 x half>, i32, i32)
<16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float>, i32, <16 x float>, i16, i32)
<8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double>, i32, <8 x double>, i8, i32)
                                                   A             Imm  WriteThru     Mask Rounding

<8 x float> @llvm.x86.avx512.mask.rndscale.ps.256(<8 x float>, i32, <8 x float>, i8)
<4 x float> @llvm.x86.avx512.mask.rndscale.ps.128(<4 x float>, i32, <4 x float>, i8)
<4 x double> @llvm.x86.avx512.mask.rndscale.pd.256(<4 x double>, i32, <4 x double>, i8)
<2 x double> @llvm.x86.avx512.mask.rndscale.pd.128(<2 x double>, i32, <2 x double>, i8)
                                                   A             Imm  WriteThru     Mask
```
2025-09-24 16:32:40 -07:00
Thurston Dang
ddd49c61cc
[msan] Handle AVX512/AVX10 rcp and rsqrt (#158397)
Adds a new handler, handleAVX512VectorGenericMaskedFP(), and applies it
to AVX512/AVX10 rcp and rsqrt
2025-09-15 12:19:14 -07:00
Thurston Dang
2fca446779
[msan] Handle AVX512 pack with saturation intrinsics (#157984)
Approximately handle avx512_{packssdw/packsswb/packusdw/packuswb} with
the existing handleVectorPackIntrinsic(), instead of relying on the
default (strict) handler.
2025-09-11 10:41:40 -07:00
Kazu Hirata
752c1cf805 [Instrumentation] Fix formatting of MemorySanitizer.cpp 2025-09-10 08:23:13 -07:00
Karlo Basioli
3c60c03f53
Mark variable as maybe unused (only used in debug mode) (#157875) 2025-09-10 16:10:32 +01:00
BaiXilin
94e2c19f86
[x86][AVX-VNNI] Fix VPDPBUSD Argument Types (#155194)
Fixed intrinsic VPDPBUSD[,S]_128/256/512's argument types to match with the ISA.

Fixes part of #97271
2025-09-10 12:24:16 +00:00
Thurston Dang
1cc84bcc08
[msan] Fix multiply-add-accumulate (#153927) to use ReductionFactor (#155748)
https://github.com/llvm/llvm-project/pull/153927 incorrectly cast using
a hardcoded reduction factor of two, rather than using the parameter.

This caused false negatives but not false positives. (The only incorrect
case was a reduction factor of four; if four values {A,B,C,D} are being
reduced, the result is fully zero iff {A,B} and {C,D} are both zero
after pairwise reduction. If only one of those reduced pairs is zero,
then the quadwise reduction is non-zero.)
2025-09-02 10:16:57 -07:00
Thurston Dang
5dafe66f07
[msan][NFCI] Refactor visitIntrinsicInst() into instruction families (#154878)
Currently visitIntrinsicInst() is a long, partly unsorted list. This patch groups them into cross-platform, X86 SIMD, and Arm SIMD families, making the overall intent of visitIntrinsicInst() clearer:

```
  void visitIntrinsicInst(IntrinsicInst &I) {
    if (maybeHandleCrossPlatformIntrinsic(I))
      return;

    if (maybeHandleX86SIMDIntrinsic(I))
      return;

    if (maybeHandleArmSIMDIntrinsic(I))
      return;

    if (maybeHandleUnknownIntrinsic(I))
      return;

    visitInstruction(I);
  }
```

There is one disadvantage: the compiler will not tell us if the switch statements in the handlers have overlapping coverage.
2025-08-25 12:11:48 -07:00
Thurston Dang
e45210afe2
[msan] Handle AVX512 VCVTPS2PH (#154460)
This extends handleAVX512VectorConvertFPToInt() from
556c8467d15a131552e3c84478d768bafd95d4e6
(https://github.com/llvm/llvm-project/pull/147377) to handle AVX512
VCVTPS2PH.
2025-08-21 15:03:01 -07:00
Thurston Dang
4220538e25
[msan] Handle multiply-add-accumulate; apply to AVX Vector Neural Network Instructions (VNNI) (#153927)
This extends the pmadd handler (recently improved in https://github.com/llvm/llvm-project/pull/153353) to three-operand intrinsics (multiply-add-accumulate), and applies it to the AVX Vector Neural Network Instructions.

Updates the tests from https://github.com/llvm/llvm-project/pull/153135
2025-08-18 13:18:27 -07:00
Thurston Dang
ade755d62b
[msan] Add Instrumentation for Avx512 Instructions: pmaddw, pmaddubs (#153919)
This applies the pmadd handler (recently improved in https://github.com/llvm/llvm-project/pull/153353) to the Avx512
equivalent of the pmaddw and pmaddubs intrinsics:
  <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16>, <32 x i16>)
  <32 x i16> @llvm.x86.avx512.pmaddubs.w.512(<64 x i8>, <64 x i8>)
2025-08-18 11:31:15 -07:00
Thurston Dang
638bd11c13
[msan] Handle SSE/AVX pshuf intrinsic by applying to shadow (#153895)
llvm.x86.sse.pshuf.w(<1 x i64>, i8) and llvm.x86.avx512.pshuf.b.512(<64
x i8>, <64 x i8>) are currently handled strictly, which is suboptimal.

llvm.x86.ssse3.pshuf.b(<1 x i64>, <1 x i64>)
llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) and
llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>) are currently heuristically
handled using maybeHandleSimpleNomemIntrinsic, which is incorrect.

Since the second argument is the shuffle order, we instrument all these
intrinsics using `handleIntrinsicByApplyingToShadow(...,
/*trailingVerbatimArgs=*/1)`
(https://github.com/llvm/llvm-project/pull/114490).
2025-08-15 20:28:30 -07:00
Thurston Dang
2b75ff192d
[msan] Reland with even more improvement: Improve packed multiply-add instrumentation (#153353)
This reverts commit cf002847a464c004a57ca4777251b1aafc33d958 i.e.,
relands ba603b5e4d44f1a25207a2a00196471d2ba93424. It was reverted
because it was subtly wrong: multiplying an uninitialized zero should
not result in an initialized zero.

This reland fixes the issue by using instrumentation analogous to
visitAnd (bitwise AND of an initialized zero and an uninitialized value
results in an initialized value). Additionally, this reland expands a
test case; fixes the commit message; and optimizes the change to avoid
the need for horizontalReduce.

The current instrumentation has false positives: it does not take into
account that multiplying an initialized zero value with an uninitialized
value results in an initialized zero value This change fixes the issue
during the multiplication step. The horizontal add step is modeled using
bitwise OR.
    
Future work can apply this improved handler to the AVX512 equivalent
intrinsics (x86_avx512_pmaddw_d_512, x86_avx512_pmaddubs_w_512.) and AVX
VNNI intrinsics.
2025-08-15 16:35:42 -07:00
Thurston Dang
cf002847a4
Revert "[msan] Improve packed multiply-add instrumentation" (#153343)
Reverts llvm/llvm-project#152941

Buildbot breakage:
https://lab.llvm.org/buildbot/#/builders/66/builds/17843
2025-08-12 21:32:07 -07:00
Thurston Dang
ba603b5e4d
[msan] Improve packed multiply-add instrumentation (#152941)
The current instrumentation has false positives: if there is a single uninitialized bit in any of the operands, the entire output is poisoned. This does not take into account that multiplying an uninitialized value with zero results in an initialized zero value.

This step allows elements that are zero to clear the corresponding shadow during the multiplication step. The horizontal add step and accumulation step (if any) are modeled using bitwise OR.

Future work can apply this improved handler to the AVX512 equivalent intrinsics (x86_avx512_pmaddw_d_512, x86_avx512_pmaddubs_w_512.) and AVX VNNI intrinsics.
2025-08-12 19:13:48 -07:00
Jie Fu
2fc1b3dd9f [MemorySanitizer] Fix an unused-variable warning (NFC)
/llvm-project/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:2752:22:
 error: unused variable 'ParamType' [-Werror,-Wunused-variable]
    FixedVectorType *ParamType =
                     ^
1 error generated.
2025-08-12 07:51:53 +08:00
Thurston Dang
ef5022745c
[NFCI][msan] Refactor into 'horizontalReduce' (#152961)
The functionality is used by two helper functions, and will be used even more in the future (e.g.,
https://github.com/llvm/llvm-project/pull/152941).
2025-08-11 15:48:20 -07:00
Nikita Popov
c23b4fbdbb
[IR] Remove size argument from lifetime intrinsics (#150248)
Now that #149310 has restricted lifetime intrinsics to only work on
allocas, we can also drop the explicit size argument. Instead, the size
is implied by the alloca.

This removes the ability to only mark a prefix of an alloca alive/dead.
We never used that capability, so we should remove the need to handle
that possibility everywhere (though many key places, including stack
coloring, did not actually respect this).
2025-08-08 11:09:34 +02:00
Nikita Popov
86727fe9a1
[IR] Allow poison argument to lifetime markers (#151148)
This slightly relaxes the invariant established in #149310, by also
allowing the lifetime argument to be poison. This is to support the
typical pattern of RAUWing with poison when removing an instruction.

It's worth noting that this does not require any conservative
assumptions, lifetimes with poison arguments can simply be skipped.

Fixes https://github.com/llvm/llvm-project/issues/151119.
2025-08-04 10:02:04 +02:00
Thurston Dang
56944e606a
[msan] Approximately handle AVX Galois Field Affine Transformation (#150794)
e.g.,
      <16 x i8> @llvm.x86.vgf2p8affineqb.128(<16 x i8>, <16 x i8>, i8)
      <32 x i8> @llvm.x86.vgf2p8affineqb.256(<32 x i8>, <32 x i8>, i8)
      <64 x i8> @llvm.x86.vgf2p8affineqb.512(<64 x i8>, <64 x i8>, i8)
       Out                                    A          x          b
where A and x are packed matrices, b is a vector, Out = A * x + b in
GF(2)

Multiplication in GF(2) is equivalent to bitwise AND. However, the
matrix computation also includes a parity calculation.

For the bitwise AND of bits V1 and V2, the exact shadow is:
Out_Shadow = (V1_Shadow & V2_Shadow) | (V1 & V2_Shadow) | (V1_Shadow &
V2)

We approximate the shadow of gf2p8affine using:
  Out_Shadow =   _mm512_gf2p8affine_epi64_epi8(x_Shadow, A_shadow, 0)
               | _mm512_gf2p8affine_epi64_epi8(x, A_shadow, 0)
               | _mm512_gf2p8affine_epi64_epi8(x_Shadow, A, 0)
               | _mm512_set1_epi8(b_Shadow)

This approximation has false negatives: if an intermediate dot-product
contains an even number of 1's, the parity is 0.

It has no false positives.

Updates the test from https://github.com/llvm/llvm-project/pull/149258
2025-07-30 08:06:50 -07:00
Kazu Hirata
3e53d4d386
[llvm] Remove unused includes (NFC) (#150265)
These are identified by misc-include-cleaner.  I've filtered out those
that break builds.  Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
2025-07-23 15:18:46 -07:00
Nikita Popov
b59aaf7da7
[Sanitizers] Remove handling for lifetimes on non-alloca insts (NFC) (#149994)
After #149310 the pointer argument of lifetime.start/lifetime.end is
guaranteed to be an alloca, so we don't need to go through
findAllocaForValue() anymore, and don't have to have special handling
for the case where it fails.
2025-07-23 09:48:32 +02:00
Thurston Dang
5c4877ee0d
[msan] Re-fix disjoint OR instrumentation from #145990 (#148760)
When disjoint OR was specified and a bit position contained a 1 in both
operands, #145990 would set the corresponding shadow bit to
uninitialized. However, the output of the operation is (LLVM) 'poison'
for the entire result, hence the entire shadow ought to be
uninitialized. This patch corrects the issue.
2025-07-15 15:32:15 -07:00
Thurston Dang
66850d0c06
[msan] Fix 'Simplify 'maskedCheckAVXIndexShadow' #147839' (#148785)
https://github.com/llvm/llvm-project/pull/147839/ incorrectly checked
the (lower bits of the) concrete value rather than the shadow.
2025-07-15 10:36:27 -07:00
Thurston Dang
6fc3b40b2c
[msan] Model is_int_min_poison to avoid false negative in abs (#148069)
Note: since this patch reduces false negatives, buggy code that formerly
passed with MSan may start failing.

The current MSan handler for abs, like Hercules' in New York, ignores
is_int_min_poison. This patch fixes the issue by poisoning the shadow
corresponding to each int_min input value if is_int_min_poison.
2025-07-10 16:47:53 -07:00
Fangrui Song
1ae99f5894 [msan] Fix -Wunused-but-set-variable after #147839 2025-07-09 18:14:19 -07:00
Thurston Dang
7c66099545
[msan] Simplify 'maskedCheckAVXIndexShadow' (#147839)
The current instrumentation has more or and element extraction than a
coal mine:

```
[[TMP10:%.*]] = extractelement <16 x i32> [[TMP9]], i64 0
[[TMP11:%.*]] = and i32 [[TMP10]], 15
[[TMP43:%.*]] = or i32 [[TMP10]], [[TMP11]]
[[TMP12:%.*]] = extractelement <16 x i32> [[TMP9]], i64 1
[[TMP13:%.*]] = and i32 [[TMP12]], 15
[[TMP44:%.*]] = or i32 [[TMP12]], [[TMP13]]
    ...
[[TMP40:%.*]] = extractelement <16 x i32> [[TMP9]], i64 15
[[TMP41:%.*]] = and i32 [[TMP40]], 15
[[TMP57:%.*]] = or i32 [[TMP40]], [[TMP41]]
[[_MSCMP:%.*]] = icmp ne i32 [[TMP57]], 0
br i1 [[_MSCMP]], label [[TMP102:%.*]], label [[TMP103:%.*]], !prof [[PROF1]]
```

Simplify it to:

```
[[TMP10:%.*]] = trunc <16 x i32> [[T]] to <16 x i4>
[[TMP12:%.*]] = bitcast <16 x i4> [[TMP10]] to i64
[[_MSCMP:%.*]] = icmp ne i64 [[TMP12]], 0
br i1 [[_MSCMP]], label %[[BB13:.*]], label %[[BB14:.*]], !prof [[PROF1]]
```
2025-07-09 17:56:16 -07:00
Thurston Dang
702784ca76
[msan] Check mask and rounding mode in handleAVX512VectorConvertFPToInt (#147782)
The checks were missing in "Add handler for
llvm.x86.avx512.mask.cvtps2dq.512
(https://github.com/llvm/llvm-project/pull/147377)
2025-07-09 13:06:45 -07:00
Thurston Dang
61d52ea764
[NFCI][msan] Refactor to use 'isFixedIntVector' etc. (#147789)
Inspired by a suggestion from Florian Google in
https://github.com/llvm/llvm-project/pull/147606#discussion_r2193548994
2025-07-09 12:07:19 -07:00
Thurston Dang
cc95e4039b
[msan] Handle AVX512 vector down convert (non-mem) intrinsics (#147606)
This handles `llvm.x86.avx512.mask.pmov{,s,us}.*.512` using
`handleIntrinsicByApplyingToShadow()` where possible, otherwise using a
customized slow-path handler, `handleAVX512VectorDownConvert()`.

Note that shadow propagation of `pmov{s,us}` (signed/unsigned
saturation) are approximated using truncation. Future work could extend
`handleAVX512VectorDownConvert()` to use `GetMinMaxUnsigned()` to handle
saturation precisely.
2025-07-08 20:51:19 -07:00
Florian Mayer
36dbe517a0
[NFC] [MSAN] disambiguate insertShadowCheck (#146616)
One of them operates on values, the other on shadows. It is confusing
for both of them to have the same name but only different number of
parameters.
2025-07-08 09:54:35 -07:00
Thurston Dang
3528e16ff8
[NFCI][msan] Extract 'maybeShrinkVectorShadow' and 'maybeExtendVectorShadowWithZeros' into helper functions (#147415)
These functions will be useful in other intrinsic handlers.
2025-07-07 17:59:37 -07:00
Florian Mayer
a3afbd33d8
[MSAN] only require needed bits to be initialized for permilvar (#147407) 2025-07-07 16:21:55 -07:00
Thurston Dang
556c8467d1
[msan] Add handler for llvm.x86.avx512.mask.cvtps2dq.512 (#147377)
Propagate the shadow according to the writemask, instead of using the
default strict handler.

Updates the test added in
https://github.com/llvm/llvm-project/pull/123980
2025-07-07 14:49:36 -07:00
Florian Mayer
0032148ea6
[MSAN] handle permi2var (#146437) 2025-07-07 11:24:17 -07:00
Thurston Dang
4cf53cd266
[msan] Fix "Add optional flag to improve instrumentation of disjoint OR (#145990)" (#146799)
The "V1" and "V2" values were already NOT'ed, hence the calculation of disjoint OR in #145990 was incorrect. This patch fixes the issue, with some refactoring and renaming of variables.
2025-07-02 20:15:58 -07:00
Florian Mayer
1f7ba23422
[NFC] [MSAN] replace (void) with [[maybe_unused]] (#146617)
The latter is preferred in the LLVM style guide.
2025-07-02 12:14:45 -07:00
Thurston Dang
afe6af14ff
[msan] Add optional flag to improve instrumentation of disjoint OR (#145990)
The disjoint OR (https://github.com/llvm/llvm-project/pull/72583) of two '1's is poison, hence the MSan ought to consider the result uninitialized (rather than initialized - i.e. a false negative - as per the existing instrumentation which ignores disjointedness). This patch adds a flag, `-msan-precise-disjoint-or`, which defaults to false (the legacy behavior). A future patch will default this flag to true.

Updates the test from https://github.com/llvm/llvm-project/pull/145982
2025-06-26 22:55:55 -07:00
Thurston Dang
5a194c1fd9
[msan] Sharpen instrumentation of Intrinsic::{ctlz,cttz} (#145609)
The current instrumentation of Intrinsic::{ctlz,cttz} has false positives. For example, consider `ctlz(0001 11??)` whereby `0` and `1` denotes initialized bits (with concrete values of 0 and 1 respectively) and `?` denotes an uninitialized bit. The result (of 3) is well-defined and the shadow ought to be fully initialized, but the current instrumentation marks it as fully uninitialized.

This patch improves the fidelity of the instrumentation by comparing the number of leading (for ctlz; trailing for cttz) zeros in the concrete value and the shadow.

This patch also renames the function from 'handleCountZeroes' to 'handleLeadingTrailingCountZeros', to clarify that the intrinsics handled do not count all the zeros (unlike `llvm.ctpop`, which counts all the 1s).
2025-06-25 09:29:59 -07:00
Thurston Dang
c85466dcd4
Reapply "[msan] Automatically print shadow for failing outlined checks" (#145611) (#145615)
This reverts commit 5eb5f0d8760c6b757c1da22682b5cf722efee489 i.e.,
relands 1b71ea411a9d36705663b1724ececbdfec7cc98c.

Test case was failing on aarch64 because the long double type is
implemented differently on x86 vs aarch64. This reland restricts the
test to x86.

----

Original CL description:
    
A commonly used aid for debugging MSan reports is
`__msan_print_shadow()`, which requires manual app code annotations
(typically of the variable in the UUM report or nearby). This is in
contrast to ASan, which automatically prints out the shadow map when a
check fails.
    
This patch changes MSan to print the shadow that failed an outlined
check (checks are outlined per function after the
`-msan-instrumentation-with-call-threshold` is exceeded) if verbosity >=
1. Note that we do not print out the shadow map of "neighboring"
variables because this is technically infeasible; see "Caveat" below.
    
This patch can be easier to use than `__msan_print_shadow()` because
this does not require manual app code annotations. Additionally, due to
optimizations, `__msan_print_shadow()` calls can sometimes spuriously
affect whether a variable is initialized.
    
As a side effect, this patch also enables outlined checks for
arbitrary-sized shadows (vs. the current hardcoded handlers for
{1,2,4,8}-byte shadows).
    
Caveat: the shadow does not necessarily correspond to an individual user
variable, because MSan instrumentation may combine and/or truncate
multiple shadows prior to emitting a check that the mangled shadow is
zero (e.g., `convertShadowToScalar()`,
`handleSSEVectorConvertIntrinsic()`, `materializeInstructionChecks()`).
OTOH it is arguably a strength that this feature emit the shadow that
directly matters for the MSan check, but which cannot be obtained using
the MSan API.
2025-06-24 20:33:11 -07:00
Thurston Dang
5eb5f0d876
Revert "[msan] Automatically print shadow for failing outlined checks" (#145611)
Reverts llvm/llvm-project#145107

Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/51/builds/18512)
2025-06-24 15:53:19 -07:00