9 Commits

Author SHA1 Message Date
Brox Chen
12900774e6
[AMDGPU][True16][CodeGen] update isel pattern with vgpr16 for 16 bit types (#154875)
Update isel pattern with 16bit types to use vgp16 in true16 mode. This
stop isel from generating illegal `vgpr32 = copy vpgr16`

This includes fcopysign, scalar_to_vector and i1 trunc. Updated lit test
and added a few mir tests.

Stacking up these changes in one patch as I realized that doing these
seperately could lead to unexpected failures in between.
2025-09-09 10:27:25 -04:00
Shilei Tian
fc0653f31c
[RFC][NFC][AMDGPU] Remove -verify-machineinstrs from llvm/test/CodeGen/AMDGPU/*.ll (#150024)
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
2025-07-23 13:42:46 -04:00
Shilei Tian
3570908519
[NFC][AMDGPU] Auto generate check lines for some codegen tests (#137534)
Make preparation for #137488.
2025-04-28 09:25:05 -04:00
Matt Arsenault
da42b2f67d
AMDGPU: Replace insertelement poison with insertelement undef (#130896)
This is the bulk update with perl, with cases which require additional
update left for later.
2025-03-12 20:33:33 +07:00
Fangrui Song
9e9907f1cf
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
Similar to 806761a7629df268c8aed49657aeccffa6bca449.

For IR files without a target triple, -mtriple= specifies the full
target triple while -march= merely sets the architecture part of the
default target triple, leaving a target triple which may not make sense,
e.g. amdgpu-apple-darwin.

Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
$unknown-apple-darwin as ELF instead of rejecting it outrightly.

This patch changes AMDGPU tests to not rely on the default
OS/environment components. Tests that need fixes are not changed:

```
  LLVM :: CodeGen/AMDGPU/fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fabs.ll
  LLVM :: CodeGen/AMDGPU/floor.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll
  LLVM :: CodeGen/AMDGPU/fneg-fabs.ll
  LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll
  LLVM :: CodeGen/AMDGPU/schedule-if-2.ll
```
2024-01-16 21:54:58 -08:00
Nikita Popov
bdf2fbba9c [AMDGPU] Convert some tests to opaque pointers (NFC) 2022-12-19 12:41:13 +01:00
Jay Foad
898b18844c [AMDGPU] Add GFX11 to some tests with manual checks
Differential Revision: https://reviews.llvm.org/D138138
2022-11-17 09:42:28 +00:00
Jonathan Roelofs
7c5d2bec76 [llvm] Fix missing FileCheck directive colons
https://reviews.llvm.org/D77352
2020-04-06 09:59:08 -06:00
Stanislav Mekhanoshin
a6322941ff [AMDGPU] gfx1010 VMEM and SMEM implementation
Differential Revision: https://reviews.llvm.org/D61330

llvm-svn: 359621
2019-04-30 22:08:23 +00:00