3 Commits

Author	SHA1	Message	Date
David Spickett	f52b89561f	[lldb][AArch64] Read fpmr register from core files (#110104) ... https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/FPMR--Floating-point-Mode-Register for details of the register.	2024-10-24 10:27:56 +01:00
David Spickett	0e24611f57	[lldb][AArch64] Add register fields for the fpmr register (#109934) ... The FP8 formats have a "_" in the name so that they are: 1. Easier to read. 2. Possible to use in register expressions if/when they are supported. Some other bits do have defined meanings but they are not simple to name. Better that folks read the manual for those. See this page for the full details: https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/FPMR--Floating-point-Mode-Register	2024-09-26 11:44:01 +01:00
David Spickett	5ee2deac0c	[lldb][AArch64][Linux] Add Floating Point Mode Register (#106695) ... Otherwise known as FEAT_FPMR. This register controls the behaviour of floating point operations. https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/FPMR--Floating-point-Mode-Register As the current floating point register contexts are fixed size, this has been placed in a new set. Linux kernel patches have landed already, so you can cross check with those. To simplify testing we're not going to do any floating point operations, just read and write from the program and debugger to make sure each sees the other's values correctly.	2024-09-25 10:27:57 +01:00