3 Commits

Author	SHA1	Message	Date
David Green	07d6af6a71	[AArch64] Fold And/Or into CSel if possible ... If we have `and x, (csel 0, 1, cc)` and we know that x is 0/1, then we can emit a `csel ZR, x, cc`. Similarly for `or x, (csel 0, 1, cc)` we can emit `csinc x, ZR, cc`. This can help where we can not otherwise general ccmp instructions. Differential Revision: https://reviews.llvm.org/D141119	2023-01-09 11:52:37 +00:00
Sanjay Patel	bf82070ea4	[SDAG] try to avoid multiply for X*Y==0 ... Forking this off from D140850 - https://alive2.llvm.org/ce/z/TgBeK_ https://alive2.llvm.org/ce/z/STVD7d We could almost justify doing this in IR, but consideration for "minsize" requires that we only try it in codegen -- the transform is not reversible. In all other cases, avoiding multiply should be a win because a mul is more expensive than simple/parallelizable compares. AArch even has a trick to keep instruction count even for some types. Differential Revision: https://reviews.llvm.org/D141086	2023-01-06 09:06:11 -05:00
Sanjay Patel	bd87b84a02	[AArch64] add tests for x*y == 0; NFC	2023-01-06 08:37:04 -05:00