13 Commits

Author SHA1 Message Date
Fangrui Song
1c22d3f55d [ARC] Convert tests to opaque pointers (NFC) 2024-02-06 12:55:16 -08:00
James Y Knight
b856e77b2d
Set MaxAtomicSizeInBitsSupported for remaining targets. (#75703)
Targets affected:

- NVPTX and BPF: set to 64 bits.
- ARC, Lanai, and MSP430: set to 0 (they don't implement atomics).

Those which didn't yet add AtomicExpandPass to their pass pipeline now
do so.

This will result in larger atomic operations getting expanded to
`__atomic_*` libcalls via AtomicExpandPass. On all these targets, this
now matches what Clang already does in the frontend.

The only targets which do not configure AtomicExpandPass now are:
- DirectX and SPIRV: they aren't normal backends.
- AVR: a single-cpu architecture with no privileged/user divide, which
could implement all atomics by disabling/enabling interrupts, regardless
of size/alignment. Will be addressed by future work.
2024-01-08 22:34:28 -05:00
Tobias Hieta
f84bac329b
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
This is a follow-up to b71edfaa4ec3c998aadb35255ce2f60bba2940b0
since I forgot the lit.local.cfg files in that one.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: barannikov88, kwk

Differential Revision: https://reviews.llvm.org/D150762
2023-05-17 17:03:15 +02:00
Simon Pilgrim
adf3daae1c [ARC] Regenerate ldst.ll
Reported by the (experimental) arc buildbot after D136042
2022-10-29 14:09:58 +01:00
Mark Schimmel
7c82db3634 [ARC] Improve code generated for i32 ADDC/ADDE and SUBC/SUBE
This change improves the code generated for long long addition and subtraction

Differential Revision: https://reviews.llvm.org/D109615
2021-09-10 13:04:08 -07:00
Thomas Johnson
ce1dc9d647 [ARC] Add codegen for the readcyclecounter intrinsic along with disassembly for associated instructions
Differential Revision: https://reviews.llvm.org/D108598
2021-08-24 11:53:20 -07:00
Thomas Johnson
b821086876 [ARC] Add codegen for count trailing zeros intrinsic for the ARC backend
Differential Revision: https://reviews.llvm.org/D107828
2021-08-10 12:07:35 -07:00
Thomas Johnson
f8a4495149 [ARC] Add codegen for llvm.ctlz intrinsic for the ARC backend
Differential Revision: https://reviews.llvm.org/D107611
2021-08-06 12:18:06 -07:00
Pete Couperus
0f661418aa [ARC] Update brcc test. 2020-08-28 17:07:25 -07:00
Fangrui Song
5b50a1656a [ARC] Fix CodeGen/ARC/brcc.ll 2020-08-15 19:33:35 -07:00
Fangrui Song
ac14f7b10c [lit] Delete empty lines at the end of lit.local.cfg NFC
llvm-svn: 363538
2019-06-17 09:51:07 +00:00
Pete Couperus
b062239d63 [ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores.
Build on newly introduced ARC postincrement loads/stores from r356200.

Patch By Denis Antrushin! <denis@synopsys.com>

Differential Revision: https://reviews.llvm.org/D59409

llvm-svn: 356606
2019-03-20 20:06:21 +00:00
Pete Couperus
2d1f6d67c5 [ARC] Add ARC backend.
Add the ARC backend as an experimental target to lib/Target.
Reviewed at: https://reviews.llvm.org/D36331

llvm-svn: 311667
2017-08-24 15:40:33 +00:00