llvm-project

Author SHA1 Message Date

Author	SHA1	Message	Date
Jakub Kuderski	714aee31e1	[mlir][vector] Add result type to `interleave` assembly format (#93392 ) This is to make it more obvious for what the result type is, especially with some less trivial cases like 0-d inputs resulting in 1-d inputs or interaction with scalable vector types. Note that `vector.deinterleave` uses the same format with explicit result type. Also improve examples and clean up surrounding code.	2024-05-27 11:03:36 -04:00
Benjamin Maxwell	a1a6860314	[mlir][VectorOps] Add unrolling for n-D vector.interleave ops (#80967 ) This unrolls n-D vector.interleave ops like: ```mlir vector.interleave %i, %j : vector<6x3xf32> ``` To a sequence of 1-D operations: ```mlir %i_0 = vector.extract %i[0] %j_0 = vector.extract %j[0] %res_0 = vector.interleave %i_0, %j_0 : vector<3xf32> vector.insert %res_0, %result[0] : // ... repeated x6 ``` The 1-D operations can then be directly lowered to LLVM. Depends on: #80966	2024-02-20 14:33:33 +00:00

Jakub Kuderski

714aee31e1

[mlir][vector] Add result type to interleave assembly format (#93392 )

This is to make it more obvious for what the result type is, especially
with some less trivial cases like 0-d inputs resulting in 1-d inputs or
interaction with scalable vector types. Note that `vector.deinterleave`
uses the same format with explicit result type.

Also improve examples and clean up surrounding code.

2024-05-27 11:03:36 -04:00

Benjamin Maxwell

a1a6860314

[mlir][VectorOps] Add unrolling for n-D vector.interleave ops (#80967 )

This unrolls n-D vector.interleave ops like:

```mlir
vector.interleave %i, %j : vector<6x3xf32>
```

To a sequence of 1-D operations:
```mlir
%i_0 = vector.extract %i[0] 
%j_0 = vector.extract %j[0] 
%res_0 = vector.interleave %i_0, %j_0 : vector<3xf32>
vector.insert %res_0, %result[0] :
// ... repeated x6
```

The 1-D operations can then be directly lowered to LLVM.

Depends on: #80966

2024-02-20 14:33:33 +00:00

2 Commits