7 Commits

Author SHA1 Message Date
Tobias Gysi
adda597388
[MLIR] Add index bitwidth to the DataLayout (#85927)
When importing from LLVM IR the data layout of all pointer types
contains an index bitwidth that should be used for index computations.
This revision adds a getter to the DataLayout that provides access to
the already stored bitwidth. The function returns an optional since only
pointer-like types have an index bitwidth. Querying the bitwidth of a
non-pointer type returns std::nullopt.

The new function works for the built-in Index type and, using a type
interface, for the LLVMPointerType.
2024-03-21 09:07:57 +01:00
Oleksandr "Alex" Zinenko
8134a8fc3f
[mlir] use TypeSize and uint64_t in DataLayout (#72874)
Data layout queries may be issued for types whose size exceeds the range
of 32-bit integer as well as for types that don't have a size known at
compile time, such as scalable vectors. Use best practices from LLVM IR
and adopt `llvm::TypeSize` for size-related queries and `uint64_t` for
alignment-related queries.

See #72678.
2023-11-21 16:12:27 +01:00
Nikita Popov
4f131b0d22
[IR] Require index width to be ule pointer width (#70015)
I don't think there is a use case for having an index type that is wider
than the pointer type, and I'm not entirely clear what semantics this
would even have.

Also clarify the GEP semantics to explicitly say how they interact with
the index type width.
2023-10-26 10:19:06 +02:00
Tobias Gysi
9d69bca187 [mlir] Add stack alignment to the data layout dialect.
The revision adds the stack alignment to the
data layout dialect and it extends the LLVM dialect
import and export to support the new data layout
entry.

One possible use case for the flag is the LLVM dialect
inliner. The LLVM inliner queries the flag to
determine if it is safe to update the alignment of an
existing alloca. We may want to perform the same
optimization inside of MLIR.

Reviewed By: Dinistro

Differential Revision: https://reviews.llvm.org/D147332
2023-04-03 06:58:37 +00:00
rkayaith
aa00e3e6c1 [mlir][llvm] Support pointer entries in data layout translation
This adds support for pointer DLTI entries in LLVMIR export, e.g.
```
// translated to: p0:32:64:128
#dlti.dl_entry<!llvm.ptr, dense<[32,64,128]> : vector<3xi32>>
// translated to: p1:32:32:32:64
#dlti.dl_entry<!llvm.ptr<1>, dense<[32,32,32,64]> : vector<4xi32>>
```

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D133434
2022-09-21 11:16:15 -04:00
Alex Zinenko
eb27da7dec [mlir] Ignore index data layout in translation to LLVM
It can be present, but is irrelevant for the translation.
2022-03-02 16:56:21 +01:00
Alex Zinenko
ea998709eb [mlir] Add partial support for translating data layout
Add support for translating data layout specifications for integer and float
types between MLIR and LLVM IR. This is a first step towards removing the
string-based LLVM dialect data layout attribute on modules. The latter is still
available and will remain so until the first-class MLIR modeling can fully
replace it.

Depends On D120739

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D120740
2022-03-02 14:56:50 +01:00