Silviu Baranga
93aefa5f2c
Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.
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llvm-svn: 168886
2012-11-29 14:41:25 +00:00
Weiming Zhao
8f56f88661
Remove hard coded registers in ARM ldrexd and strexd instructions
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This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.
llvm-svn: 168207
2012-11-16 21:55:34 +00:00
Eli Friedman
7c3bdede25
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM.
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llvm-svn: 138872
2011-08-31 18:26:09 +00:00
Eli Friedman
1ccecbb9d3
64-bit atomic cmpxchg for ARM.
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llvm-svn: 138868
2011-08-31 17:52:22 +00:00
Eli Friedman
2c7bb52f56
Some minor cleanups for r138845.
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llvm-svn: 138846
2011-08-31 00:41:05 +00:00
Eli Friedman
c3f9c4a852
Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.
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llvm-svn: 138845
2011-08-31 00:31:29 +00:00
