191172 Commits

Author SHA1 Message Date
Alex Bradbury
8fcb1263f4
[PreISelIntrinsicLowering] Produce a memset_pattern16 libcall for llvm.experimental.memset.pattern when available (#120420)
This is to enable a transition of LoopIdiomRecognize to selecting the
llvm.experimental.memset.pattern intrinsic as requested in #118632 (as
opposed to supporting selection of the libcall or the intrinsic). As
such, although it _is_ a TODO to add costing considerations on whether
to lower to the libcall (when available) or expand directly, lacking
such logic is helpful at this stage in order to minimise any unexpected
code gen changes in this transition.
2025-01-30 07:12:53 +00:00
Craig Topper
dd3edc8365
[CodeGen] Add Register::stackSlotIndex(). Replace uses of Register::stackSlot2Index. NFC (#125028) 2025-01-29 23:02:07 -08:00
Sebastian Pop
4b2d615774
[DA] use alias analysis cross iteration mode (#116628)
This patch fixes two bugs:
https://github.com/llvm/llvm-project/issues/41488
https://github.com/llvm/llvm-project/issues/53942

The dependence analysis assumes that the base address of array accesses
is invariant across loop iterations. In both bugs the base address
evolves following loop iterations: the base address flip-flops between
two different memory objects.

The patch uses the cross iteration mode of alias analysis to disambiguate the
base objects.
2025-01-29 22:53:24 -06:00
Akshat Oke
11026a8d8b
[CodeGen][NewPM] Preserve all MF analyses in MFPM (#124707)
Invalidation is already handled in the passes loop for MFAM, so all of
the rest analyses are preserved. (See `PassManager::run()`)

This won't change the number of invalidations, but will prevent needless
`MFAM::Invalidator::invalidate()` invocations made by results depending
on other results (since the invalidate shorts if `<AllAnalysesOn<MF>>`
is preserved)
2025-01-30 10:01:58 +05:30
Matt Arsenault
1cbfac04d0
SystemZ: Handle copies between gr64 and fp64 (#124890)
I'm guessing based on tablegen definitions. I also don't
really understand how this could have been missing.

This defends against regressions in a future peephole-opt
patch.
2025-01-30 11:08:08 +07:00
Matt Arsenault
6017480461
MachineVerifier: Fix check for range type (#124894)
We need to permit scalar extending loads with range annotations.

Fix expensive_checks failures after 11db7fb09b36e656a801117d6a2492133e9c2e46
2025-01-30 10:56:12 +07:00
Matt Arsenault
97a1f494a6
DAG: Avoid breaking legal vector_shuffle with multiple uses (#123712)
Previously this combine would undo AMDGPU's new custom legalization of
wide vector shuffles into 2 element pieces. The comment also
states that this combine is only done before legalization,
but the case with a build_vector source was unconditional.

We probably don't want to do this if the multiple uses are full
scalarization of the vector, but this seems to work well enough.
Scalarizing extracts should have folded out pre-legalize.
2025-01-30 10:55:21 +07:00
Teresa Johnson
edb7f6c0da
[MemProf] Add more assertion checking to the edge removal helper (#125017)
Check a few unexpected cases (edge already removed, edge not in its
caller or callee edge lists).
2025-01-29 19:23:35 -08:00
Lang Hames
b1bd73700a [ORC] Add missing files from d6524c8dfa3. 2025-01-30 13:48:08 +11:00
Lang Hames
d6524c8dfa Reapply "[ORC] Enable JIT support for the compact-unwind frame..." with fixes.
This reapplies 4f0325873fa (and follow up patches 26fc07d5d88, a001cc0e6cdc,
c9bc242e387, and fd174f0ff3e), which were reverted in 212cdc9a377 to
investigate bot failures (e.g.
https://lab.llvm.org/buildbot/#/builders/108/builds/8502)

The fix to address the bot failures was landed in d0052ebbe2e. This patch also
restricts construction of the UnwindInfoManager object to Apple platforms (as
it won't be used on other platforms).
2025-01-30 13:42:10 +11:00
Teresa Johnson
6c3bf34114
[MemProf] Fix summary identification for imported locals (#124659)
When we apply cloning decisions in the ThinLTO backend, we need to find
the corresponding summary for each function in the IR, and in some cases
for callee functions. This is complicated when the function was a
promoted local, in which case the GUID was formed from the hash of the
original source file prepended to the function name. Those functions
can be identified by the fact that they were given a ".llvm." suffix
during promotion.

We previously didn't do this correctly for promoted locals imported from
other modules, as we only tried the current module source name. This led
to crashes, in particular when the current module also had an local
function of the same original name. In particular, we were attempting to
iterate through the wrong summary's callsites, and there were fewer than
in the actual function so we accessed data off the end (in a release
build with assertion checking off - with assertion checking on we double
check the stack ids and that would have failed). Even if we hadn't
crashed or hit an assert, we could have applied the wrong cloning
decisions, leading to unsats at link time.

Luckily, function importing attaches thinlto_src_file metadata
containing the original source file name to all imported functions. It
normally doesn't do this by default, however, it always does if MemProf
context disambiguation is enabled. Therefore, we can just look to see if
the function contains this metadata and if so use it to recreate the
original GUID.

A similar issue can occur when looking for the ValueInfo / GUID of
a direct tail call to see if we synthesized a callsite record for a
missing tail call frame. In that case, the callee function may be a
declaration, if we imported its caller but not the callee function
definition. Because imported declarations don't get the thinlto_src_file
metadata, we instead look at its caller (which works because this
happens very early in the backend before any inlining).
2025-01-29 18:22:14 -08:00
Carl Ritson
a3a3e6997b
[AMDGPU] Rewrite GFX12 SGPR hazard handling to dedicated pass (#118750)
- Algorithm operates over whole IR to attempt to minimize waits.
- Add support for VALU->VALU SGPR hazards via VA_SDST/VA_VCC.
2025-01-30 11:21:11 +09:00
Yingwei Zheng
3c6aa04cf4
[CodeGenPrepare] Replace deleted ext instr with the promoted value. (#71058)
This PR replaces the deleted ext with the promoted value in `AddrMode`.
Fixes #70938.
2025-01-30 08:58:23 +08:00
Alex MacLean
de7438e472
[NVPTX] Auto-Upgrade some nvvm.annotations to attributes (#119261)
Add a new AutoUpgrade function to convert some legacy nvvm.annotations
metadata to function level attributes. These attributes are quicker to
look-up so improve compile time and are more idiomatic than using
metadata which should not include required information that changes the
meaning of the program.

Currently supported annotations are:

- !"kernel" -> ptx_kernel calling convention
- !"align" -> alignstack parameter attributes (return not yet supported)
2025-01-29 16:27:27 -08:00
vporpo
e094c0fa67
[SandboxVec][Legality] Don't vectorize when instructions repeat (#124479)
This patch adds a legality check that checks for repeated instrs in a
bundle and won't vectorize if such pattern is found.
2025-01-29 15:54:15 -08:00
Kazu Hirata
774b12c4a0
[memprof] Initialize AllocInfoIter and CallSitesIter (NFC) (#124972)
This patch initializes AllocInfoIter and CallSitesIter to their
respective end().  I'm doing this not because I'm worried about
uninitialized iterators, but because the resulting code looks shorter
and makes it clear which data structure each iterator is associated
with.
2025-01-29 14:31:00 -08:00
Teresa Johnson
8a86e6aefe
[MemProf] Constify a couple of methods used during cloning (#124994)
This also helps ensure we don't inadvartently create map entries
by forcing use of at() instead of operator[].
2025-01-29 14:18:11 -08:00
Simon Pilgrim
5921295dca
Revert "[SLP] getSpillCost - fully populate IntrinsicCostAttributes to improve cost analysis." (#124962)
Reverts llvm/llvm-project#124129 as its currently causing a regression at #124499 - avoids the regression until a proper fix can be added to getSpillCost
2025-01-29 22:17:53 +00:00
Sebastian Pop
46f9cddfd7
[DA] enable update_analyze_test_checks.py (#123435)
Modify the DA pretty printer to match the output of other analysis
passes. This enables update_analyze_test_checks.py to also work on DA
tests. Auto generate all the Dependence Analysis tests.
2025-01-29 15:40:22 -06:00
quic-areg
61ea63baaf
[Hexagon] Add support for decoding PLT symbols (#123425)
Describes PLT entries for hexagon.
2025-01-29 15:37:23 -06:00
Axel Sorenson
d3161defd6
[PassBuilder] VectorizerEnd Extension Points (#123494)
Added an extension point after vectorizer passes in the PassBuilder.
Additionally, added extension points before and after vectorizer passes
in `buildLTODefaultPipeline`. Credit goes to @mshockwave for guiding me
through my first LLVM contribution (and my first open source
contribution in general!) :)
- Implemented `registerVectorizerEndEPCallback`
- Implemented `invokeVectorizerEndEPCallbacks`
- Added `VectorizerEndEPCallbacks` SmallVector
- Added a command line option `passes-ep-vectorizer-end` to
`NewPMDriver.cpp`
- `buildModuleOptimizationPipeline` now calls
`invokeVectorizerEndEPCallbacks`
- `buildO0DefaultPipeline` now calls `invokeVectorizerEndEPCallbacks`
- `buildLTODefaultPipeline` now calls BOTH
`invokeVectorizerStartEPCallbacks` and `invokeVectorizerEndEPCallbacks`
- Added LIT tests to `new-pm-defaults.ll`, `new-pm-lto-defaults.ll`,
`new-pm-O0-ep-callbacks.ll`, and `pass-pipeline-parsing.ll`
- Renamed `CHECK-EP-Peephole` to `CHECK-EP-PEEPHOLE` in
`new-pm-lto-defaults.ll` for consistency.

This code is intended for developers that wish to implement and run
custom passes after the vectorizer passes in the PassBuilder pipeline.
For example, in #91796, a pass was created that changed the induction
variables of vectorized code. This is right after the vectorization
passes.
2025-01-29 11:24:03 -08:00
Benjamin Kramer
57f1731979 [KernelInfo] Remove unused include. 2025-01-29 19:45:06 +01:00
Benjamin Kramer
953354c7af [KernelInfo] Fix layering violation, Analysis cannot depend on Passes 2025-01-29 19:40:13 +01:00
Teresa Johnson
ae6d5dd58b
[MemProf] Prune unneeded non-cold contexts (#124823)
We can take advantage of the fact that we subsequently only clone cold
allocation contexts, since not cold behavior is the default, and
significantly reduce the amount of metadata (and later ThinLTO summary
and MemProfContextDisambiguation graph nodes) by pruning unnecessary not
cold contexts when building metadata from the trie.

Specifically, we only need to keep notcold contexts that overlap the
longest with cold allocations, to know how deeply to clone those
contexts to expose the cold allocation behavior.

For a large target this reduced ThinLTO bitcode object sizes by about
35%. It reduced the ThinLTO indexing time by about half and the peak
ThinLTO indexing memory by about 20%.
2025-01-29 10:38:31 -08:00
Simon Pilgrim
5dae05f684 Fix MSVC signed/unsigned mismatch warning. NFC. 2025-01-29 18:01:42 +00:00
Jay Foad
aa2952165c
Fix typo "tranpose" (#124929) 2025-01-29 17:49:54 +00:00
Craig Topper
27e01d1d74
[X86] Use new Flags argument to storeRegToStackSlot to simplify code. NFC (#124658)
Use the Flags argument to add FrameSetup directly instead of walking
backwards to add the flag after the call.
2025-01-29 09:45:29 -08:00
Craig Topper
7fff2527f8
[PowerPC] Use SelectionDAG::makeEquivalentMemoryOrdering(). NFC (#124889) 2025-01-29 09:45:00 -08:00
Joel E. Denny
18f8106f31
[KernelInfo] Implement new LLVM IR pass for GPU code analysis (#102944)
This patch implements an LLVM IR pass, named kernel-info, that reports
various statistics for codes compiled for GPUs. The ultimate goal of
these statistics to help identify bad code patterns and ways to mitigate
them. The pass operates at the LLVM IR level so that it can, in theory,
support any LLVM-based compiler for programming languages supporting
GPUs. It has been tested so far with LLVM IR generated by Clang for
OpenMP offload codes targeting NVIDIA GPUs and AMD GPUs.

By default, the pass runs at the end of LTO, and options like
``-Rpass=kernel-info`` enable its remarks. Example `opt` and `clang`
command lines appear in `llvm/docs/KernelInfo.rst`. Remarks include
summary statistics (e.g., total size of static allocas) and individual
occurrences (e.g., source location of each alloca). Examples of its
output appear in tests in `llvm/test/Analysis/KernelInfo`.
2025-01-29 12:40:19 -05:00
Konstantina Mitropoulou
9adc99bcc5
[AMDGPU] Always emit SI_KILL_I1_PSEUDO for uniform floating point branches. (#124028)
- **[NFC] Use GCNPat instead of Pat.**
- **[AMDGPU] Always emit SI_KILL_I1_PSEUDO for uniform floating point
branches.**

---------

Co-authored-by: Konstantina Mitropoulou <KonstantinaMitropoulou@amd.com>
2025-01-29 09:00:40 -08:00
Nikita Popov
8a43d0e873 [Attributor] Check correct IRPosition in AANoCapture::isImpliedByIR()
This case is intended to check the callee argument, not the call-site.

Fixes an issue introduced in #123181.
2025-01-29 17:34:10 +01:00
Michael Maitland
35defdf470 Revert "[ReachingDefAnalysis][NFC] Use at instead of lookup for DenseMap access"
This reverts commit 3ce97e4aa98ad6a3502528818ff11eee89ef2fae. Pushed to main
prematurley.
2025-01-29 08:21:59 -08:00
Michael Maitland
3ce97e4aa9 [ReachingDefAnalysis][NFC] Use at instead of lookup for DenseMap access
`at` has an assert that the key exists. Since we are assuming the key exists,
use `at` instead of `lookup`.
2025-01-29 08:15:56 -08:00
Nikita Popov
29441e4f5f
[IR] Convert from nocapture to captures(none) (#123181)
This PR removes the old `nocapture` attribute, replacing it with the new
`captures` attribute introduced in #116990. This change is
intended to be essentially NFC, replacing existing uses of `nocapture`
with `captures(none)` without adding any new analysis capabilities.
Making use of non-`none` values is left for a followup.

Some notes:
* `nocapture` will be upgraded to `captures(none)` by the bitcode
   reader.
* `nocapture` will also be upgraded by the textual IR reader. This is to
   make it easier to use old IR files and somewhat reduce the test churn in
   this PR.
* Helper APIs like `doesNotCapture()` will check for `captures(none)`.
* MLIR import will convert `captures(none)` into an `llvm.nocapture`
   attribute. The representation in the LLVM IR dialect should be updated
   separately.
2025-01-29 16:56:47 +01:00
Mikhail Gudim
3c3c850a45
[ReachingDefAnalysis] Extend the analysis to stack objects. (#118097)
We track definitions of stack objects, the implementation is identical
to tracking of registers.

Also, added printing of all found reaching definitions for testing
purposes.

---------

Co-authored-by: Michael Maitland <michaeltmaitland@gmail.com>
2025-01-29 10:55:16 -05:00
Kazu Hirata
8baa0d9d54
[CodeGen] Avoid repeated hash lookups (NFC) (#124885) 2025-01-29 07:49:05 -08:00
Juan Manuel Martinez Caamaño
0c63ec5347
[NFC][SIWholeQuadMode] Remove redundant arguments (#124930) 2025-01-29 16:33:15 +01:00
Yingwei Zheng
f226cabbb1
[ValueTracking] Handle nonnull attributes at callsite (#124908)
Alive2: https://alive2.llvm.org/ce/z/yJfskv
Closes https://github.com/llvm/llvm-project/issues/124540.
2025-01-29 23:14:36 +08:00
Michael Maitland
5a4945fa4d
[RISCV][SIFIVE] Fix latencies for vector integer arithmetic long latency (#124855)
These instructions go through a longer latency pipeline of 8.
2025-01-29 09:42:51 -05:00
Juan Manuel Martinez Caamaño
2e43f39223
[NFC][SIWholeQuadMode] Perform less lookups (#124927) 2025-01-29 15:36:54 +01:00
David Blaikie
ce96c26cd6
Revert "[llvm][DebugInfo] Attach object-pointer to DISubprogram declarations (#122742)" (#124853)
This introduces a substantial (5-10%) regression in .debug_info size, so
we're discussing alternatives in #122742 and #124790.

This reverts commit 7c729418d721147bf1f2b257afd30f84721888ad.
2025-01-29 15:11:33 +01:00
Alexey Bataev
4a1a697427
[SLP][NFC]Unify ScalarToTreeEntries and MultiNodeScalars, NFC
Currently, SLP has 2 distinct storages to manage mapping between
vectorized instructions and their corresponding vectorized TreeEntry
nodes. It leads to inefficient lookup for the matching TreeEntries and
makes it harder to correctly track instructions, associated with
multiple nodes.
There is a plan to extend this support for instructions, that require
scheduling, to allow support for copyable elements. Merging
ScalarToTreeEntry and MultiNodeScalars will allow reduce maintenance of
the feature

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/124914
2025-01-29 09:05:54 -05:00
Yingwei Zheng
cf37ae5cae
[InstCombine] Add one-use check when folding fabs over selects (#122270)
Fixes multi-use issue introduced by
https://github.com/llvm/llvm-project/pull/86390.
It allows the folding of `fabs (select Cond, TrueC, FalseC)` to avoid performance regression in ocio
2025-01-29 21:44:59 +08:00
Acim Maravic
3a29dfe37c
[LLVM][AMDGPU] Add Intrinsic and Builtin for ds_bpermute_fi_b32 (#124616) 2025-01-29 14:04:10 +01:00
David Green
66e0498daf
[GlobalISel] Do not run verifier after ResetMachineFunctionPass (#124799)
After we fall back from GlobalISel to SDAG, the verifier gets called,
which calls getReservedRegs which uses SIMachineFunctionInfo::usesAGPRs
which caches the result of UsesAGPRs. Because we have just fallen-back
the function is empty and it incorrectly gets cached to false. This
patch makes sure we don't try to run the verifier whilst the function is
empty.
2025-01-29 12:48:11 +00:00
Ivan Kosarev
983562d8c5
[AMDGPU][NFC] Simplify t16/fake16 TableGen definitions. (#122693)
Infer mnemonics from the names of the records.
2025-01-29 12:46:05 +00:00
Alexey Bataev
2f40145826
[RISCV][TTI]Use processShuffleMasks for cost estimations/actual per-register shuffles
Patch adds usage of processShuffleMasks in TTI for RISCV. This function is already used for X86
shuffles estimations and in DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE
functions and in RISCV codegen.
Patch allows better cost estimation for sparse masks and unifies
cost/codegen between different targets/passes

Reviewers: preames

Reviewed By: preames

Pull Request: https://github.com/llvm/llvm-project/pull/118103
2025-01-29 07:18:55 -05:00
Florian Hahn
2b55ef187c
[VPlan] Add helper to run VPlan passes, verify after run (NFC). (#123640)
Add new runPass helpers to run a VPlan transformation. This makes it
easier to add additional checks/functionality for each transform run. In
this patch, an option is added to run the verifier after each VPlan
transform.

Follow-ups will use the same helper to also support printing VPlans
after each transform.

Note that the verifier at the moment requires there to be a canonical IV
and vector loop region, so the final lowering transforms aren't run via
runPass yet.

PR: https://github.com/llvm/llvm-project/pull/123640
2025-01-29 10:50:01 +00:00
Oliver Stannard
36b3c43524
[AArch64] PAUTH_PROLOGUE should not be duplicated with PAuthLR (#124775)
When using PAuthLR, the PAUTH_PROLOGUE expands into a sequence of
instructions which takes the address of one of those instructions, and
uses that address to compute the return address signature. If this is
duplicated, there will be two different addresses used in calculating
the signature, so the epilogue will only be correct for (at most) one of
them.

This change also restricts code generation when using v8.3-A return
address signing, without PAuthLR. This isn't strictly needed, as
duplicating the prologue there would be valid. We could fix this by
having two copies of PAUTH_PROLOGUE, with and without isNotDuplicable,
but I don't think it's worth adding the extra complexity to a security
feature for that.
2025-01-29 10:42:47 +00:00
Ryotaro Kasuga
690f251063
[LoopInterchange] Handle LE and GE correctly (#124901)
LoopInterchange have converted `DVEntry::LE` and `DVEntry::GE` in
direction vectors to '<' and '>' respectively. This handling is
incorrect because the information about the '=' it lost. This leads to
miscompilation in some cases. To resolve this issue, convert them to '*'
instead.

Resolve #123920
2025-01-29 19:30:54 +09:00