543 Commits

Author SHA1 Message Date
Fangrui Song
4c7aa6f983 [msan] Fix -Wunused-variable in non-assertion builds after #124421 2025-01-28 20:20:25 -08:00
Thurston Dang
fdadef9be3
[msan] Handle x86_avx512_(min|max)_p[sd]_512 intrinsics (#124421)
The AVX/SSE variants are already handled heuristically (maybeHandleSimpleNomemIntrinsic via handleUnknownIntrinsic), but the AVX512 variants contain an additional parameter (the rounding method) which fails to match heuristically. This patch generalizes maybeHandleSimpleNomemIntrinsic to allow additional flags (ignored by MSan) and explicitly call it to handle AVX512 min/max ps/pd intrinsics.

It also updates the test added in https://github.com/llvm/llvm-project/pull/123980
2025-01-28 19:12:44 -08:00
Thurston Dang
4a426079d6
[msan] Use horizontal add to compute shadow for horizontal sub (#124835)
This improves the horizontal sub handling (from
https://github.com/llvm/llvm-project/pull/124159), by always using
horizontal add for the shadow, as recommended by Vitaly.

Fixes https://github.com/llvm/llvm-project/issues/124662
2025-01-28 14:56:05 -08:00
Thurston Dang
7bd9c780e3
[msan][NFCI] Generalize handleIntrinsicByApplyingToShadow to allow alternative intrinsic for shadows (#124831)
https://github.com/llvm/llvm-project/pull/124159 uses
handleIntrinsicByApplyingToShadow for horizontal add/sub, but Vitaly
recommends always using the add version to avoid false negatives for
fully uninitialized data
(https://github.com/llvm/llvm-project/issues/124662).

This patch lays the groundwork by generalizing
handleIntrinsicByApplyingToShadow to allow using a different intrinsic
(of the same type as the original intrinsic) for the shadow. Planned
work will apply it to horizontal sub.
2025-01-28 12:35:07 -08:00
Thurston Dang
063db51cd4 Reapply "[msan] Add handlers for AVX masked load/store intrinsics (#123857)"
This reverts commit b9d301cc7e4fe4c442ec15169686fa4a18f5cdfc i.e.,
relands db79fb2a91df31a07f312f8e061936927ac5c506.

I had mistakenly thought this caused a buildbot breakage (the actual
culprit was my other patch,
https://github.com/llvm/llvm-project/pull/123980, which landed at the
same time) and thus had reverted it even though AFAIK it is not broken.
2025-01-28 18:11:44 +00:00
Jeremy Morse
e14962a39c
[NFC][DebugInfo] Use iterators for instruction insertion in more places (#124291)
As part of the "RemoveDIs" work to eliminate debug intrinsics, we're
replacing methods that use Instruction*'s as positions with iterators.
This patch changes some more complex call-sites, those crossing file
boundaries and where I've had to perform some minor rewrites.
2025-01-27 15:25:17 +00:00
Thurston Dang
b9d301cc7e Revert "[msan] Add handlers for AVX masked load/store intrinsics (#123857)"
This reverts commit db79fb2a91df31a07f312f8e061936927ac5c506.

Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/144/builds/16636/steps/6/logs/FAIL__LLVM__avx512-intrinsics-upgrade_ll)
2025-01-27 01:10:35 +00:00
Thurston Dang
db79fb2a91
[msan] Add handlers for AVX masked load/store intrinsics (#123857)
This patch adds explicit support for AVX masked load/store intrinsics,
largely by applying the intrinsics to the shadows (but subtly different
to handleIntrinsicByApplyingToShadow()).

We do not reuse the handleMaskedLoad/Store functions. The key challenge
is that the LLVM masked intrinsics require a vector of booleans, while
AVX masked intrinsics use the MSBs of a vector of integers.
X86InstCombineIntrinsic.cpp::simplifyX86MaskedLoad mentions that the x86
backend does not know how to efficiently convert from a vector of
booleans back into the AVX mask format; therefore, they (and we) do not
reduce AVX masked intrinsics into LLVM masked intrinsics.
2025-01-26 15:40:55 -08:00
Jeremy Morse
6292a808b3
[NFC][DebugInfo] Use iterator-flavour getFirstNonPHI at many call-sites (#123737)
As part of the "RemoveDIs" project, BasicBlock::iterator now carries a
debug-info bit that's needed when getFirstNonPHI and similar feed into
instruction insertion positions. Call-sites where that's necessary were
updated a year ago; but to ensure some type safety however, we'd like to
have all calls to getFirstNonPHI use the iterator-returning version.

This patch changes a bunch of call-sites calling getFirstNonPHI to use
getFirstNonPHIIt, which returns an iterator. All these call sites are
where it's obviously safe to fetch the iterator then dereference it. A
follow-up patch will contain less-obviously-safe changes.

We'll eventually deprecate and remove the instruction-pointer
getFirstNonPHI, but not before adding concise documentation of what
considerations are needed (very few).

---------

Co-authored-by: Stephen Tozer <Melamoto@gmail.com>
2025-01-24 13:27:56 +00:00
Thurston Dang
8ef171ee83
[msan] Handle horizontal add/subtract intrinsic by applying to shadow (#124159)
Horizontal add (hadd) and subtract (hsub) are currently heuristically
handled by `maybeHandleSimpleNomemIntrinsic()` (via
`handleUnknownIntrinsic()`), which computes the shadow by bitwise OR'ing
the two operands. This has false positives for hadd/hsub shadows. For
example, suppose the shadows for the two operands are 00000000 and
11111111 respectively. The expected shadow for the result is 00001111,
but `maybeHandleSimpleNomemIntrinsic` would compute it as 11111111.

This patch handles horizontal add using
`handleIntrinsicByApplyingToShadow` (from
https://github.com/llvm/llvm-project/pull/114490), which has no false
positives for hadd/hsub: if each pair of adjacent shadow values is zero
(fully initialized), the result will be zero (fully initialized). More
generally, it is precise for hadd/hsub if at least one of the two
adjacent shadow values in each pair is zero.

It does have some false negatives for hadd/hsub: if we add/subtract two
adjacent non-zero shadow values, some bits of the result may incorrectly
be zero. We consider this an acceptable tradeoff for performance. To
make shadow propagation precise, we want the equivalent of "horizontal
OR", but this is not available. Reducing horizontal OR to (permutation
plus bitwise OR) is left as an exercise for the reader.
2025-01-23 22:53:56 -08:00
Thurston Dang
969eb4ec4c [msan][NFC] Correct and clarify comment for getShadowPtrOffset()
The stated return type was incorrect; this patch corrects it. More generally, it explains how the Offset and its components fits into the overall shadow mapping calculation.
2025-01-24 00:36:40 +00:00
Thurston Dang
9cefa3e6fc
[msan] Generalize handleIntrinsicByApplyingToShadow by adding bitcasting (#123474)
`handleIntrinsicByApplyingToShadow` (introduced in
https://github.com/llvm/llvm-project/pull/114490) requires that the
intrinsic supports integer-ish operands; this is not the case for all
intrinsics. This patch generalizes the function to bitcast the shadow
arguments to be the same type as the original intrinsic, thus
guaranteeing that the intrinsic exists. Additionally, it casts the
computed shadow to be an appropriate shadow type.

This function assumes that the intrinsic will handle arbitrary
bit-patterns (for example, if the intrinsic accepts floats for var1, we
assume that it works normally even if inputs are NaNs etc.).
2025-01-22 18:17:14 -08:00
Mats Jun Larsen
416f1c465d
[IR] Replace of PointerType::get(Type) with opaque version (NFC) (#123617)
In accordance with https://github.com/llvm/llvm-project/issues/123569

In order to keep the patch at reasonable size, this PR only covers for
the llvm subproject, unittests excluded.
2025-01-21 00:32:56 +09:00
Thurston Dang
58a70dffcc
[msan] Add debugging for handleUnknownIntrinsic (#123381)
This adds an experimental flag, msan-dump-strict-intrinsics (modeled
after msan-dump-strict-instructions), which prints out any intrinsics
that are heuristically handled. Additionally, MSan will print out
heuristically handled intrinsics when -debug is passed as a flag in
debug builds.

MSan's intrinsic handling can be broken down into:

1) special cases (usually highly accurate)
2) heuristic handling (sometimes erroneous)
3) not handled

This patch's -msan-dump-strict-intrinsics is intended to help debug Case
2. Case 3) (which includes all the heuristics that are not handled by
special cases nor heuristics) can be debugged using the existing
-msan-dump-strict-instructions.
2025-01-17 11:27:39 -08:00
Sergey Kachkov
04b002bbb8
[IRBuilder] Add Align argument for CreateMaskedExpandLoad and CreateMaskedCompressStore (#122878)
This patch adds possibility to specify alignment for
llvm.masked.expandload/llvm.masked.compressstore intrinsics in IRBuilder
(this is mostly NFC for now since it's only used in MemorySanitizer, but
there is an intention to generate these intrinsics in the compiler
passes, e.g. in LoopVectorizer)
2025-01-15 12:19:23 +03:00
Alexander Shaposhnikov
3791323343
[msan] Add support for avx_round_pd_256/avx_round_ps_256 (#119334)
Add support for avx_round_pd_256/avx_round_ps_256.
This is a follow-up to https://github.com/llvm/llvm-project/pull/118441

Test plan:
ninja check-all
2024-12-09 23:27:34 -08:00
Thurston Dang
3b74abdf04
[msan] Support NEON vector multiplication instructions (#117944)
Approximates the shadow propagation via OR'ing.

Updates the neon_vmul.ll test introduced in
https://github.com/llvm/llvm-project/pull/117935
2024-12-09 11:39:29 -08:00
Kazu Hirata
1b95e76d8f [Instrumentation] Fix a warning
This patch fixes:

  llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:3840:14:
  error: unused variable 'NumArgOperands' [-Werror,-Wunused-variable]
2024-12-04 08:31:40 -08:00
Alexander Shaposhnikov
95e44d3670
[msan] Add handling for sse41_round_pd/sse41_round_ps (#118441)
Add handling for sse41_round_pd/sse41_round_ps similarly to
maybeHandleSimpleNomemIntrinsic.

Test plan: ninja check-all
2024-12-04 08:27:08 -08:00
k-kashapov
f2fa9ac616
[nfc][MSan] Change for-loop to ArgNo instead of drop_begin (#117553)
As discussed in
https://github.com/llvm/llvm-project/pull/109284#discussion_r1838830571
Changed for loop to use `ArgNo` instead of `drop_begin` to keep loop
code consistent with other helpers.

Co-authored-by: Kamil Kashapov <kashapov@ispras.ru>
2024-12-03 14:32:54 -08:00
k-kashapov
d9e2fb70d0
[msan] Add 32-bit platforms support (#109284)
References https://github.com/llvm/llvm-project/issues/103057

Added `VAArgHelper` functions for platforms: ARM32, i386, RISC-V,
PowerPC32, MIPS32.

ARM, RISCV and MIPS share similar conventions regarding va args.
Therefore `VAArgGenericHelper` was introduced to avoid code duplication.

---------

Co-authored-by: Kamil Kashapov <kashapov@ispras.ru>
Co-authored-by: Vitaly Buka <vitalybuka@google.com>
2024-11-14 01:41:13 -08:00
Vitaly Buka
debfd7b0b4
[msan] Remove unnecacary zero increment (#116185) 2024-11-14 00:59:01 -08:00
Kamil Kashapov
ad26835b2c [nfc][msan] Move VarArgGenericHelper
Part of #109284
2024-11-12 00:36:44 -08:00
Kamil Kashapov
469ac11841 [nfc][msan] Remove 64 from VarArg*Helper names
Part of #109284
2024-11-12 00:26:35 -08:00
Kamil Kashapov
b94a24e5dd [nfc][msan] Reorder ifs in CreateVarArgHelper
Part of #109284
2024-11-12 00:26:35 -08:00
Vitaly Buka
adb476b012
[nfc][msan] Clang-format MemorySanitizer.cpp (#115828)
Extracted from #109284

Co-authored-by: Kamil Kashapov <kashapov@ispras.ru>
2024-11-11 23:17:05 -08:00
Thurston Dang
e549ec529c
[msan] Add handleIntrinsicByApplyingToShadow; support NEON tbl/tbx (#114490)
This adds a general function that handles intrinsics by applying the
intrinsic to the shadows, and applies it to the specific case of Arm
NEON TBL/TBX intrinsics.

This also updates the tests from
https://github.com/llvm/llvm-project/pull/114462
2024-11-01 14:58:45 -07:00
Vitaly Buka
cf8d24531e
[msan] Reduces overhead of #113200, by 10% (#113201)
CTMark #113200 size overhead was 5.3%, now it's 4.7%.

The patch affects only signed integers.

https://alive2.llvm.org/ce/z/Lv5hyi

* The patch replaces code which extracted sign bit,
maximized/minimized it, then packed it back, with
simple sign bit flip. The another way to think about
transformation is as a subtraction of MIN_SINT from
A/B. Then we map MIN_SINT to 0, 0 to -MIN_SINT, and
MAX_SINT to MAX_UINT.

* Then to maximize/minimize A/B we don't need
to extract sign bit, we can apply shadow the
same way as to other bits.

* After sign bit flip, we had to switch to unsigned
version of the predicates.

* After change above  getHighestPossibleValue/getLowestPossibleValue
became very similar, so we can combine into a single function.

* Because the function does sign bit flip and
requires unsigned predicates used for returned values,
there is no point in keeping it as a member of class,
to hide, we switch to function local lambda.
2024-10-24 20:46:49 -07:00
Vitaly Buka
c77d8edf80
Revert "Revert "[msan] Switch to -msan-handle-icmp-exact my default"" (#113379)
Reverts llvm/llvm-project#113376

Fixed with #113378
2024-10-22 14:05:35 -07:00
Vitaly Buka
71792dc570
[NFC][msan] Workaround arg evaluation order diff GCC vs Clang (#113378) 2024-10-22 13:31:46 -07:00
Vitaly Buka
c3aa8b7dd6
Revert "[msan] Switch to -msan-handle-icmp-exact my default" (#113376)
Reverts llvm/llvm-project#113200

Breaks bots, see llvm/llvm-project#113200
2024-10-22 13:05:59 -07:00
Vitaly Buka
395093ec15
[msan] Switch to -msan-handle-icmp-exact my default (#113200)
Fixes #111212.

This grows .text by 5.3% on CTMark, (or 2.6% large internal binary)
Perf regressed by 1.6%. We will try to improve in follow up patches.

It worth to pay some performance regression to fix
correctness to avoid stuff like #111212.
2024-10-22 12:35:18 -07:00
Jay Foad
85c17e4092
[LLVM] Make more use of IRBuilder::CreateIntrinsic. NFC. (#112706)
Convert many instances of:
  Fn = Intrinsic::getOrInsertDeclaration(...);
  CreateCall(Fn, ...)
to the equivalent CreateIntrinsic call.
2024-10-17 16:20:43 +01:00
Rahul Joshi
fa789dffb1
[NFC] Rename Intrinsic::getDeclaration to getOrInsertDeclaration (#111752)
Rename the function to reflect its correct behavior and to be consistent
with `Module::getOrInsertFunction`. This is also in preparation of
adding a new `Intrinsic::getDeclaration` that will have behavior similar
to `Module::getFunction` (i.e, just lookup, no creation).
2024-10-11 05:26:03 -07:00
Antonio Frighetto
2ae968a0d9
[Instrumentation] Move out to Utils (NFC) (#108532)
Utility functions have been moved out to Utils. Minor opportunity to
drop the header where not needed.
2024-09-15 21:07:40 -07:00
Nikita Popov
03d5b7ca3d [MemorySanitizer] Don't create types pointers (NFC)
Everything in this pass uses a single addrspace 0 pointer type.
Don't try to create it using the typed pointer ctor.

This allows removing the type argument from
getShadowPtrForVAArgument().
2024-09-05 11:54:56 +02:00
Chaitanya
62ced8116b
[Sanitizer] Make sanitizer passes idempotent (#99439)
This PR changes the sanitizer passes to be idempotent. 
When any sanitizer pass is run after it has already been run before,
double instrumentation is seen in the resulting IR. This happens because
there is no check in the pass, to verify if IR has been instrumented
before.

This PR checks if "nosanitize_*" module flag is already present and if
true, return early without running the pass again.
2024-08-12 11:16:44 +05:30
Thurston Dang
cb5ec3796a
[msan] Support vst{2,3,4}_lane instructions (#101215)
This generalizes MSan's Arm NEON vst support, to include the
lane-specific variants.

This also updates the test from
https://github.com/llvm/llvm-project/pull/100645.
2024-08-09 10:16:38 -07:00
Thurston Dang
4ce559d059
[msan] Support most Arm NEON vector shift instructions (#102507)
This adds support for the Arm NEON vector shift instructions that follow
the same pattern as x86 (handleVectorShiftIntrinsic).

VSLI is not supported because it does not follow the 2-argument pattern
expected by handleVectorShiftIntrinsic.

This patch also updates the arm64-vshift.ll MSan test that was
introduced in
5d0a12d3e9
2024-08-08 17:02:04 -07:00
Thurston Dang
bbde3f6e9d
[msan] Support vst1x_{2,3,4} and vst_{2,3,4} with floating-point parameters (#100644)
Cloning the vst_ intrinsics to apply them to the shadows did not work if
the arguments were floating-point, since the shadows are integers. This
patch changes MSan to create an intrinsic of the correct integer types.

Additionally, this patch adds support for vst1x_{2,3,4}; these can be
handled similarly to vst_{2,3,4}, since in all cases we are adapting the
corresponding intrinsic.
    
This also updates the tests.
2024-07-29 20:57:28 -07:00
James Y Knight
dfeb3991fb
Remove the x86_mmx IR type. (#98505)
It is now translated to `<1 x i64>`, which allows the removal of a bunch
of special casing.

This _incompatibly_ changes the ABI of any LLVM IR function with
`x86_mmx` arguments or returns: instead of passing in mmx registers,
they will now be passed via integer registers. However, the real-world
incompatibility caused by this is expected to be minimal, because Clang
never uses the x86_mmx type -- it lowers `__m64` to either `<1 x i64>`
or `double`, depending on ABI.

This change does _not_ eliminate the SelectionDAG `MVT::x86mmx` type.
That type simply no longer corresponds to an IR type, and is used only
by MMX intrinsics and inline-asm operands.

Because SelectionDAGBuilder only knows how to generate the
operands/results of intrinsics based on the IR type, it thus now
generates the intrinsics with the type MVT::v1i64, instead of
MVT::x86mmx. We need to fix this before the DAG LegalizeTypes, and thus
have the X86 backend fix them up in DAGCombine. (This may be a
short-lived hack, if all the MMX intrinsics can be removed in upcoming
changes.)

Works towards issue #98272.
2024-07-25 09:19:22 -04:00
Thurston Dang
54dab7dfcf
[msan] Implement support for Arm NEON vst{2,3,4} instructions (#99360)
This adds support for vst{2,3,4}, which are not correctly handled by
handleUnknownIntrinsic/handleVector{Load,Store}Intrinsic.

This patch also updates the tests introduced in
https://github.com/llvm/llvm-project/pull/98247 and
https://github.com/llvm/llvm-project/pull/99555

---------

Co-authored-by: Vitaly Buka <vitalybuka@gmail.com>
2024-07-19 11:02:57 -07:00
Sam James
996d31c7ba
[msan] Fix goo.gl link in comment for Valgrind paper
goo.gl is going away: https://developers.googleblog.com/en/google-url-shortener-links-will-no-longer-be-available/

Fix goo.gl link from:
- http://goo.gl/QKbem
+ https://static.usenix.org/event/usenix05/tech/general/full_papers/seward/seward_html/usenix2005.html
and reflow the comment a bit to make it look a bit better after the URL change,
although it's not perfect now.

Committed as obvious.

Bug: https://github.com/llvm/llvm-project/issues/99586
2024-07-19 00:54:24 +01:00
Thurston Dang
7002ecb4c6
[msan] Convert vector shadow to scalar before zext (#96722)
zext does not allow converting vector shadow to scalar, so we must
manually convert it prior to calling zext in materializeOneCheck, for
which the 'ConvertedShadow' parameter isn't actually guaranteed to be
scalar (1). Note that it is safe/no-op to call convertShadowToScalar on
a shadow that is already scalar.

In contrast, the storeOrigin function already converts the (potentially
vector) shadow to scalar; we add a comment to note why it is load
bearing.

(1) In materializeInstructionChecks():
"// Disable combining in some cases. TrackOrigins checks each shadow to
pick
 // correct origin.
 bool Combine = !MS.TrackOrigins;
 ...
       if (!Combine) {
        materializeOneCheck(IRB, ConvertedShadow, ShadowData.Origin);
        continue;
      }"
2024-07-03 12:40:12 -07:00
Kazu Hirata
4b28b3fae4
[Transforms] Use range-based for loops (NFC) (#97195) 2024-07-02 16:20:44 -07:00
Nikita Popov
9df71d7673
[IR] Add getDataLayout() helpers to Function and GlobalValue (#96919)
Similar to https://github.com/llvm/llvm-project/pull/96902, this adds
`getDataLayout()` helpers to Function and GlobalValue, replacing the
current `getParent()->getDataLayout()` pattern.
2024-06-28 08:36:49 +02:00
Vitaly Buka
34aa6c5d9a [msan] Handle blendv intrinsics (#94882)
blendvs are very similar to select, so we adjust
arguments and forward them into select handler.
2024-06-12 19:44:18 -07:00
Vitaly Buka
3bd9d4dedf
[msan] Implement shadow propagation for _mm_dp_pd, _mm_dp_ps, _mm256_dp_ps (#94875)
Default intrinsic handling was to report any
uninitialized part of argument. However intrinsics
use mask which allow to ignore parts of input, so
it's OK to have vectors partially initialized.
2024-06-11 22:48:40 -07:00
NMiehlbradt
1b66306c9c
[KMSAN] Enable on PowerPC64 (#73611)
Enable -fsanitize=kernel-memory support in Clang.

Add tests.

---------

Co-authored-by: Nicholas Miehlbradt <nicholas@linux.ibm.com>
2024-06-12 13:32:39 +08:00
Vitaly Buka
983bf65794
[NFC][msan] Extract handleSelectLikeInst (#94881)
`blendv` instructions are very similar to `select`.
We will add support for them in followup patches.
2024-06-10 13:12:00 -07:00