19 Commits

Author SHA1 Message Date
Matt Arsenault
a05a1d6eef
AMDGPU: Add basic verification for mfma scale intrinsics (#117048)
Verify the format is valid and the type is one of the expected
i32 vectors. Verify the used vector types at least cover the
requirements of the corresponding format operand.
2024-11-22 12:13:21 -08:00
sstipano
eb16acedf5
[AMDGPU] Overload resource descriptor in image intrinsics. (#107255) 2024-09-27 15:33:52 +02:00
Stanislav Mekhanoshin
d0e7714de7
[AMDGPU] Error on non-global pointer with s_prefetch_data (#107624) 2024-09-13 11:14:28 -07:00
Vikram Hegde
35f7b60aa6
[AMDGPU] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (#92725)
These are incremental changes over #89217 , with core logic being the
same. This patch along with #89217 and #91190 should get us ready to enable 64
bit optimizations in atomic optimizer.
2024-06-26 09:24:09 +05:30
Jay Foad
18ec885a26
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
They have been superseded by llvm.amdgcn.raw.buffer.* and
llvm.amdgcn.struct.buffer.*.
2024-06-10 12:14:51 +01:00
Jay Foad
fbe98da623 [AMDGPU] Fix filecheck annotation typos
Co-authored-by: klensy <nightouser@gmail.com>
2024-05-29 15:01:48 +01:00
Diana
9d4094ae80
[AMDGPU] Add llvm.amdgcn.set.inactive.chain.arg intrinsic (#71530)
Add a new intrinsic, similar to llvm.amdgcn.set.inactive, but used only
in functions with the `amdgpu_cs_chain` or `amdgpu_cs_chain_preserve`
calling conventions. It allows setting the inactive lanes to those of a
value received as a VGPR argument (whereas llvm.amdgcn.set.inactive
usually takes a constant as the value of the inactive lanes).

Differential Revision: https://reviews.llvm.org/D158604
2023-11-08 08:44:13 +01:00
Diana Picus
5a8ecd6456 [AMDGPU] More verifier checks for llvm.amdgcn.cs.chain
Check that the SGPR arguments have the `inreg` attribute and the VGPR
arguments don't.

Differential Revision: https://reviews.llvm.org/D156409
2023-08-17 09:37:20 +02:00
Diana Picus
8762bc77b4 [AMDGPU] Add llvm.amdgcn.cs.chain intrinsic to IR & verifier
We only check a subset of the constraints in the verifier:
* that we only call the intrinsic from functions with a restricted set of
calling conventions
* that the 'flags' argument is an immediate

Other checks are (probably) more appropriate for codegen.

Differential Revision: https://reviews.llvm.org/D151995
2023-06-22 10:02:45 +02:00
Matt Arsenault
92ee60b66f AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw 2023-06-21 21:20:26 -04:00
Tobias Hieta
f84bac329b
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
This is a follow-up to b71edfaa4ec3c998aadb35255ce2f60bba2940b0
since I forgot the lit.local.cfg files in that one.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: barannikov88, kwk

Differential Revision: https://reviews.llvm.org/D150762
2023-05-17 17:03:15 +02:00
Nikita Popov
c820f2a43e [Verifier] Convert some tests to opaque pointers (NFC) 2023-01-05 13:11:44 +01:00
Matt Arsenault
a080e345e4 AMDGPU: Fix missing immarg on buffer.atomic.fadd intrinsic 2020-06-05 14:34:07 -04:00
Matt Arsenault
64e9528201 AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov
The first operand maps to an immediate field, so this should be
immarg.
2020-01-22 09:01:34 -05:00
Matt Arsenault
c65a9db43e AMDGPU: Fix missing immarg for mfma intrinsics
llvm-svn: 366230
2019-07-16 17:22:21 +00:00
Matt Arsenault
ba4373ea7d AMDGPU: Fix missing immarg from interp intrinsics
llvm-svn: 366110
2019-07-15 19:12:00 +00:00
Stanislav Mekhanoshin
68a2fef9ae [AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
Differential Revision: https://reviews.llvm.org/D63301

llvm-svn: 363339
2019-06-13 23:47:36 +00:00
Stanislav Mekhanoshin
2bda177da0 [AMDGPU] ImmArg and SourceOfDivergence for permlane/dpp
Added missing ImmArg and SourceOfDivergence to the crosslane
intrinsics.

Differential Revision: https://reviews.llvm.org/D63216

llvm-svn: 363276
2019-06-13 16:31:51 +00:00
Matt Arsenault
caf1316f71 IR: Add immarg attribute
This indicates an intrinsic parameter is required to be a constant,
and should not be replaced with a non-constant value.

Add the attribute to all AMDGPU and generic intrinsics that comments
indicate it should apply to. I scanned other target intrinsics, but I
don't see any obvious comments indicating which arguments are intended
to be only immediates.

This breaks one questionable testcase for the autoupgrade. I'm unclear
on whether the autoupgrade is supposed to really handle declarations
which were never valid. The verifier fails because the attributes now
refer to a parameter past the end of the argument list.

llvm-svn: 355981
2019-03-12 21:02:54 +00:00