51453 Commits

Author SHA1 Message Date
Teresa Johnson
a28261c711 [MemProf] Create single version of helper function (NFC)
Small clean up to keep a single version of getAllocTypeAttributeString
which was duplicated locally.
2023-05-05 18:31:35 -07:00
William Huang
4357824c63 [llvm-profdata] ProfileReader cleanup - preparation for MD5 refactoring
Cleanup profile reader classes to prepare for complex refactoring as propsed in D147740 (Use MD5 as key for profile map). Change is too complicated so I am cleaning up the reader implementation first with these goals.
-  Reduce duplicated/similar logic
-  Reduce virtual functions, changing them to non-virtual
-  Reduce unnecessry checks, indirections, and dead writes.

This is patch 1/n. This patch refactors NameTable

Explaining several decisions here

1. useMD5() means whether  names of the profiles (the ProfileMap) are represented as MD5. It is NOT whether the input profile format is MD5. This function is an interface for IPO passes to decide whether to match function names or function MD5. There are two motives here:
(a) Eventually we want to use MD5 to represent all function contexts because it is much faster to use it as a key for lookup tables (prototype implementation D147740), so in compilation mode we call setProfileUseMD5() to force use MD5. While in tools mode (llvm-profdata) we want to keep the function name info if it's in the input profile.
(b) We also propose to allow multiple name tables and profile sections in ExtBinary format, and it could consist of name tables with or without using MD5, in this case MD5 prevails and other name tables are converted to MD5.

2. MD5 handling logic is pushed up to BinaryReader base class, because this trades a non-devirtualized virtual function call with a predictable branch. ReadStringFromTable() accounts for >5% time when loading a full 1 GB profile, it should not be virtual.

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D148868
2023-05-06 00:21:03 +00:00
Teresa Johnson
cfad2d3a3d [MemProf] Context disambiguation cloning pass [patch 4/4]
Applies ThinLTO cloning decisions made during the thin link and
recorded in the summary index to the IR during the ThinLTO backend.

Depends on D141077.

Differential Revision: https://reviews.llvm.org/D149117
2023-05-05 16:26:32 -07:00
Fangrui Song
8afd831b45 ms inline asm: recognize case-insensitive JMP and CALL as TargetLowering::C_Address
In a `__asm` block, a symbol reference is usually a memory constraint
(indirect TargetLowering::C_Memory) [LOOP]. CALL and JUMP instructions are special
that `__asm call k` can be an address constraint, if `k` is a function.

Clang always gives us indirect TargetLowering::C_Memory and need to convert it
to direct TargetLowering::C_Address. D133914 implements this conversion, but
does not consider JMP or case-insensitive CALL. This patch implements the missing
cases, so that `__asm jmp k` (`jmp ${0:P}`) will correctly lower to `jmp _k`
instead of `jmp dword ptr [_k]`.

(`__asm call k` lowered to `call dword ptr ${0:P}` and is fixed by D149695 to
lower to `call ${0:P}` instead.)

[LOOP]: Some instructions like LOOP{,E,NE} and Jcc always use an address
constraint (`loop _k` instead of `loop dword ptr [_k]`).

After this patch and D149579, all the following cases will be correct.
```
int k(int);
int (*kptr)(int);
...
__asm call k; // correct without this patch
__asm CALL k; // correct, but needs this patch to be compatible with D149579
__asm jmp k;  // correct, but needs this patch to be compatible with D149579
__asm call kptr; // will be fixed by D149579.  "Broken case" in clang/test/CodeGen/ms-inline-asm-functions.c
__asm jmp kptr;  // will be fixed by this patch and D149579
```

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D149920
2023-05-05 15:32:32 -07:00
Teresa Johnson
04f3c5a71e Restore again "[MemProf] Context disambiguation cloning pass [patch 3/4]"
This reverts commit f09807ca9dda2f588298d8733e89a81105c88120, restoring
bfe7205975a63a605ff3faacd97fe4c1bf4c19b3 and follow on fix
e3e6bc699574550f2ed1de07f4e5bcdddaa65557, now that the nondeterminism
has been addressed by D149924.

Differential Revision: https://reviews.llvm.org/D141077
2023-05-05 13:27:33 -07:00
Simon Pilgrim
c7fce3f98b [DAG] Rename computeOverflowKind -> computeOverflowForUnsignedAdd. NFC.
Matches the naming convention for the equivalent ValueTracking helpers - further SelectionDAG computeOverflowFor*() helpers will be added soon.
2023-05-05 19:38:54 +01:00
Vasileios Porpodas
7749f6e976 [SLP][NFC] Cleanup: Outline the code that vectorizes CmpInsts into a seaparate function.
Differential Revision: https://reviews.llvm.org/D149919
2023-05-05 09:56:41 -07:00
Thomas Lively
72a72315b0 [WebAssembly] Mark @llvm.wasm.shuffle lane indices as immediates
This intrinsic is meant to lower directly to the i8x16.shuffle instruction,
which takes its lane index arguments as immmediates. The ISel for the intrinsic
assumed that the lane index arguments were constants, so bitcode that
"incorrectly" used this intrinsic with non-immediate arguments caused an
assertion failure in the backend.

Avoid the crash by defining the lane index arguments to be immediates, matching
the underlying instruction. Update ISel accordingly. This change means that the
bitcode that previously caused a crash will now fail to validate.

Fixes #55559.

Reviewed By: dschuff

Differential Revision: https://reviews.llvm.org/D149898
2023-05-05 08:12:41 -07:00
Konstantin Zhuravlyov
a1be6f0290 AMDGPU: Reserve 0x048, 0x049, 0x04a MACHs
Differential Revision: https://reviews.llvm.org/D149856
2023-05-05 11:05:07 -04:00
Simon Pilgrim
04e809ab90 [DAG] Add TargetLowering::expandABD and convert X86 lowering to use it
Scalar widening cases are still custom lowered in the X86 backend - we still need to add promotion/legalization support to handle these
2023-05-05 15:13:23 +01:00
Matt Devereau
ea228bd0bd [AArch64] Emit FNMADD instead of FNEG(FMADD)
Emit FNMADD instead of FNEG(FMADD) for optimization levels
above Oz when fast-math flags (nsz+contract) permit it.

Differential Revision: https://reviews.llvm.org/D149260
2023-05-05 13:35:51 +00:00
Matt Devereau
f9ff2468af Revert "[AArch64] Emit FNMADD instead of FNEG(FMADD)"
This reverts commit caa95c2408677d7af8c7be4da203ea9271854f46.
2023-05-05 10:50:23 +00:00
Matt Devereau
caa95c2408 [AArch64] Emit FNMADD instead of FNEG(FMADD)
Emit FNMADD instead of FNEG(FMADD) for optimization levels
above Oz when fast-math flags (nsz+contract) permit it.

Differential Revision: https://reviews.llvm.org/D149260
2023-05-05 08:14:17 +00:00
Fangrui Song
01260bbc6b [MC] registerSymbol: change an output paramter to return value 2023-05-04 22:17:56 -07:00
Teresa Johnson
f09807ca9d Revert "Restore "[MemProf] Context disambiguation cloning pass [patch 3/4]""
This reverts commit bfe7205975a63a605ff3faacd97fe4c1bf4c19b3, and follow
on fix e3e6bc699574550f2ed1de07f4e5bcdddaa65557, due to some remaining
instability exposed by the bot enabling expensive checks:
https://lab.llvm.org/buildbot/#/builders/42/builds/9842
2023-05-04 09:41:48 -07:00
Akash Banerjee
35309db7dc [OpenMP][OMPIRBuilder] Migrate MapCombinedInfoTy from Clang to OpenMPIRBuilder
This patch migrates the MapCombinedInfoTy from Clang codegen to OpenMPIRBuilder.

Differential Revision: https://reviews.llvm.org/D149666
2023-05-04 16:51:06 +01:00
Teresa Johnson
bfe7205975 Restore "[MemProf] Context disambiguation cloning pass [patch 3/4]"
This reverts commit 6fbf022908c104a380fd1854fb96eafc64509366, restoring
commit bf6ff4fd4b735afffc65f92a4a79f6610e7174c3 with a fix for a bot
failure due to a previously unstable iteration order.

Differential Revision: https://reviews.llvm.org/D141077
2023-05-04 06:31:44 -07:00
NAKAMURA Takumi
342a3ce27e Move LLT::dump()'s impl to LowLevelType.cpp
Suggested by @jobnoorman
https://reviews.llvm.org/D148767#4317848
2023-05-04 21:29:59 +09:00
Laszlo Kindrat
17faae95d7 [ADT] Introduce map_to_vector helper
The following pattern is common in the llvm codebase, as well as in downstream projects:
```
llvm::to_vector(llvm::map_range(container, lambda))
```
This patch introduces a shortcut for this called `map_to_vector`.

This template depends on both `llvm/ADT/SmallVector.h` and `llvm/ADT/STLExtras.h`, and since these are both relatively large and do not depend on each other, the `map_to_vector` helper is placed in a new header under `llvm/ADT/SmallVectorExtras.h`. Only a handful of use cases have been updated to use the new helper.

Differential Revision: https://reviews.llvm.org/D145390
2023-05-04 06:25:25 -05:00
Alexey Lapshin
06b617064a [Support][Parallel] Change check for nested TaskGroups.
This patch changes check for nested TaskGroups so that it allows
parallel execution for TaskGroups. Following pattern would not work
parallelly with current check:

std::function<void()> Fn = [&]() {
  parallel::TaskGroup tg;

  tg.spawn([&]() { });
};

ThreadPool Pool;

Pool.async(Fn);
Pool.async(Fn);

Pool.wait();

One of the TaskGroup would work sequentially as current check
verifies overall number of TaskGroup. Two not nested
TaskGroups can work parallelly but current check prevents this.

Also this patch avoids parallel mode for TaskGroup
in parallel::strategy.ThreadsRequested == 1 case.

This patch is a followup of discussion from D142318

Differential Revision: https://reviews.llvm.org/D148984
2023-05-04 11:28:39 +02:00
Fangrui Song
b05cd680ea MCInstrAnalysis: make GotPltSectionVA x86-32 specific
GotPltSectionVA is specific to x86-32 PIC PLT entries.
Let's remove the argument from the generic interface.

As a side effect of not requiring .got.plt, this simplification
addresses a subset of https://github.com/llvm/llvm-project/issues/62537
by enabling .plt dumping for some ld.bfd -z now linked x86-32/x86-64 images
without .got.plt
2023-05-03 19:21:01 -07:00
Teresa Johnson
6fbf022908 Revert "[MemProf] Context disambiguation cloning pass [patch 3/4]"
This reverts commit bf6ff4fd4b735afffc65f92a4a79f6610e7174c3.

There is a bot failure where we are getting the correct remarks output
but in a different order. I'll need to investigate to see where we are
having nondeterministic behavior.
2023-05-03 14:08:54 -07:00
Teresa Johnson
bf6ff4fd4b [MemProf] Context disambiguation cloning pass [patch 3/4]
Applies cloning decisions to the IR, cloning functions and updating
calls. For Regular LTO, the IR is updated directly during function
assignment, whereas for ThinLTO it is recorded in the summary index
(a subsequent patch will apply to the IR via the index during the
ThinLTO backend.

The function assignment and cloning proceeds greedily, and we create new
clones as needed when we find an incompatible assignment of function
clones to callsite clones (i.e. when different callers need to invoke
different combinations of callsite clones).

Depends on D140949.

Differential Revision: https://reviews.llvm.org/D141077
2023-05-03 13:34:00 -07:00
Volodymyr Sapsai
24f36a215b [Modules] Move modulemaps to header search directories. NFC intended.
In code we use `#include "llvm/Lib/Header.h"` which is located in
"llvm/include/llvm/Lib/Header.h", so we use "llvm/include/" as a header
search path. We should put modulemaps in the same directory and
shouldn't rely on clang to search in immediate subdirectories.

rdar://106677321

Differential Revision: https://reviews.llvm.org/D148776
2023-05-03 13:07:47 -07:00
Nick Desaulniers
3b01fa264c [Demangle] remove unused status param of itaniumDemangle
No call sites interpreted this value meaningfully. Simplify this
interface.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D149707
2023-05-03 11:51:35 -07:00
Nick Desaulniers
7277a72b90 [Demangle] remove unused params of itaniumDemangle
No call sites use these parameters, so drop them.
Equivalent to D148940.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D149703
2023-05-03 09:57:41 -07:00
Felipe de Azevedo Piovezan
a524f84780 [SelectionDAG][NFCI] Use common logic for identifying MMI vars
After function argument lowering, but prior to instruction selection,
dbg declares pointing to function arguments are lowered using special
logic.

Later, during instruction selection (both "fast" and regular ISel), this
logic is "repeated" in order to identify which intrinsics have already
been lowered. This is bad for two reasons:

1. The logic is not _really_ repeated, the code is different, which
could lead to duplicate lowering of the intrinsic.
2. Even if the logic were repeated properly, this is still code
duplication.

This patch addresses these issues by storing all preprocessed
dbg.declare intrinsics in a set inside FuncInfo; the set is queried upon
instruction selection.

Differential Revision: https://reviews.llvm.org/D149682
2023-05-03 10:58:31 -04:00
Matt Arsenault
d3c6c3f63c ValueTracking: Sign handling for minnum/maxnum
If we know one operand is positive for maxnum, or one is negative
for minnum, the result will have the same sign.
2023-05-02 19:10:37 -04:00
Nick Desaulniers
3e3c6f24ff Revert "[Demangle] make llvm::demangle take std::string_view rather than const std::string&"
This reverts commit c117c2c8ba4afd45a006043ec6dd858652b2ffcc.

itaniumDemangle calls std::strlen with the results of
std::string_view::data() which may not be NUL-terminated. This causes
lld/test/wasm/why-extract.s  to fail when "expensive checks" are enabled
via -DLLVM_ENABLE_EXPENSIVE_CHECKS=ON. See D149675 for further
discussion. Back this out until the individual demanglers are converted
to use std::string_view.
2023-05-02 15:54:09 -07:00
Teresa Johnson
a4bdb27538 [MemProf] Use profiled lifetime access density directly
Now that the runtime tracks the lifetime access density directly, we can
use that directly in the threshold checks instead of less accurately
computing from other statistics.

Differential Revision: https://reviews.llvm.org/D149684
2023-05-02 15:19:34 -07:00
Dávid Bolvanský
20831c3c23 [MachineInst] Switch NumOperands to 16bits
Decrease NumOperands from 32 to 16bits (matches MCInstrDesc) so we can use saved bits to extend Flags (https://reviews.llvm.org/D118118).

Reviewed By: barannikov88

Differential Revision: https://reviews.llvm.org/D149445
2023-05-02 22:48:22 +02:00
Teresa Johnson
e0577ce367 [MemProf] Removed unused allocation type
Removes the 'notcoldandcold' allocation type summary
(de)serialization support added in D135714, after realizing that this
will never be generated in practice.

There are 2 uses of the allocation type keywords in the summary. One is
for the individual profiled memprof context summaries, and each context
can only be assigned a single type of hotness. The second is in the
clone version information produced by the MemProfContextDisambiguation
whole program step, and we only create a clone for a specific allocation
type.

Differential Revision: https://reviews.llvm.org/D149669
2023-05-02 13:11:35 -07:00
Vitaly Buka
1c61accbde [CodeGen] Fix signed int overflow
Exposed by the test from 8f966cedea594d9a91e585e88a80a42c04049e6c.
2023-05-02 12:58:07 -07:00
Nick Desaulniers
c117c2c8ba [Demangle] make llvm::demangle take std::string_view rather than const std::string&
As suggested by @erichkeane in
https://reviews.llvm.org/D141451#inline-1429549

There's potential for a lot more cleanups around these APIs. This is
just a start.

Callers need to be more careful about sub-expressions producing strings
that don't outlast the expression using ``llvm::demangle``. Add a
release note.

Reviewed By: MaskRay, #lld-macho

Differential Revision: https://reviews.llvm.org/D149104
2023-05-02 11:20:15 -07:00
NAKAMURA Takumi
d091a19e58 Temporary fix for MVT::getSizeInBits() to handle aarch64svcount
Support/MVTTest.cpp was missing text matrix for it.

FIXME: `aarch64svcount` should be in the td.
2023-05-03 02:23:24 +09:00
Alexey Lapshin
85c2768ce9 [Support][Parallel] Initialize threadIndex and add assertion checking its usage.
That patch adds a check for threadIndex being used with only threads
created by ThreadPoolExecutor. This helps catch two types of errors:

1. If a thread is created not by ThreadPoolExecutor its index may clash
   with the index of another thread. Using threadIndex, in that case, may
   lead to a data race.

2. Index of the main thread(threadIndex == 0) currently clashes with
   the index of thread0 in ThreadPoolExecutor threads. That may lead
   to a data race if main thread and thread0 are executed concurrently.

This patch allows execution tasks on the main thread only in case
parallel::strategy.ThreadsRequested == 1. In all other cases,
assertions check that threadIndex != UINT_MAX(i.e. that task
is executed on a thread created by ThreadPoolExecutor).

Differential Revision: https://reviews.llvm.org/D148916
2023-05-02 18:44:15 +02:00
NAKAMURA Takumi
631bfdbee5 Switch llvm/CodeGen/MachineValueType.h to the generated one
Prune `SupportTests/MVTTest` since it is no longer needed.

Depends on D148769

Differential Revision: https://reviews.llvm.org/D148770
2023-05-03 00:13:20 +09:00
NAKAMURA Takumi
c1221251fb Restore CodeGen/MachineValueType.h from Support
This is rework of;

  - rG13e77db2df94 (r328395; MVT)

Since `LowLevelType.h` has been restored to `CodeGen`, `MachinveValueType.h`
can be restored as well.

Depends on D148767

Differential Revision: https://reviews.llvm.org/D149024
2023-05-03 00:13:20 +09:00
NAKAMURA Takumi
9cfeba5b12 Restore CodeGen/LowLevelType from Support
This is rework of;
  - D30046 (LLT)

Since I have introduced `llvm-min-tblgen` as D146352, `llvm-tblgen`
may depend on `CodeGen`.

`LowLevlType.h` originally belonged to `CodeGen`. Almost all userse are
still under `CodeGen` or `Target`. I think `CodeGen` is the right place
to put `LowLevelType.h`.

`MachineValueType.h` may be moved as well. (later, D149024)

I have made many modules depend on `CodeGen`. It is consistent but
inefficient. It will be split out later, D148769

Besides, I had to isolate MVT and LLT in modmap, since
`llvm::PredicateInfo` clashes between `TableGen/CodeGenSchedule.h`
and `Transforms/Utils/PredicateInfo.h`.
(I think better to introduce namespace llvm::TableGen)

Depends on D145937, D146352, and D148768.

Differential Revision: https://reviews.llvm.org/D148767
2023-05-03 00:13:19 +09:00
Alexey Lapshin
709bc11266 [DWARFLinker][NFC] Make interfaces to be compatible.
This patch makes interface of AddressManager from DWARFLinker
to be compatible with AddressesMap from DWARFLinkerParallel.
This makes both linkers to be interchangeable.

Differential Revision: https://reviews.llvm.org/D147455
2023-05-02 14:59:23 +02:00
Nikita Popov
5362a0d859 [LCSSA] Remove unused ScalarEvolution argument (NFC)
After D149435, LCSSA formation no longer needs access to
ScalarEvolution, so remove the argument from the utilities.
2023-05-02 12:17:05 +02:00
Christian Ulmann
a4cc7e784f [PGO] Avoid potential const_cast UB (NFC)
This commit removes potential UB in the PGO instrumentation passes that
was caused by casting away constness and then potentially modifying the
object.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D148903
2023-05-02 09:18:37 +00:00
NAKAMURA Takumi
243e8f8d23 Introduce llvm-min-tblgen to build public header files
`llvm-min-tblgen` is capable of building `llvm/include/llvm`;

- `-gen-attrs`
- `-gen-directive-*`
- `-gen-intrinsics-*`
- `-gen-riscv-target-def`

`llvm-min-tblgen` is built and used only when `llvm-tblgen` is built in-tree.
This is not installed.

`llvm-tblgen` is built with complete set and may be installed.
`check-llvm` uses not `llvm-min-tblgen` but `llvm-tblgen`.

`LLVM_TABLEGEN_PROJECT` overrides the definition of `tablegen(project)`.
`LLVM_HEADERS` is used as the overridden prefix for LLVM header generators.

If `EXPORT` is not specified in `add_tablegen`, its tablegen is treated as internal.

Let `llvm-tblgen` depend on `intrinsics_gen`

Depends on D149072

Differential Revision: https://reviews.llvm.org/D146352
2023-05-02 11:32:22 +09:00
Craig Topper
fa42e7b6bc [RISCV] Merge RISCV::parseCPUKind and RISCV::checkCPUKind.
Similar for RISCV::parseTuneCPU and RISCV::checkTuneCPUKind.

This makes the CPUKind enum no longer part of the API. It wasn't
providing much value. It was only used to pass between the two
functions.

By removing it, we can remove a dependency on a tablegen generated
file from the RISCVTargetParser.h file. Then we can remove a
dependency from several CMakeLists.txt.
2023-05-01 13:00:05 -07:00
Philip Reames
4343534a67 [LAA] Rework overflow checking in getPtrStride [nfc]
The previous code structure and comments were exceedingly confusing.  I have multiple times looked at this code and suspected a bug.  This time, I decided to take the time to reflow the code and comment out why it is correct.

The only suspect (to me) case left is that an underaligned access with a unit stride (in terms of the access type) might miss the undefined null pointer when wrapping.  This is unlikely to be an issue for C/C++ code with real page sizes, so I'm not bothering to fully convince myself whether that case is correct or not.
2023-05-01 10:21:02 -07:00
William Huang
d38d6ca179 [llvm-profdata] Deprecate Compact Binary Sample Profile Format
Remove support for compact binary sample profile format

Reviewed By: davidxl, wenlei

Differential Revision: https://reviews.llvm.org/D149400
2023-05-01 17:10:08 +00:00
Craig Topper
9b1aaaf933 Revert "[RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h."
This reverts commit ee9cbe3548cded885c6409d6dd8a616b515a06d3.

I've been told this cauess a namespace clash in lld.
2023-04-29 18:05:56 -07:00
Craig Topper
ee9cbe3548 [RISCV] Move RISCV::RVVBitsPerBlock from TargetParser to Support/RISCVISAInfo.h.
RISCVTargetParser.h has a dependency on a tablegen generated file.

Using RISCVISAInfo.h instead avoids this dependency.

We just need this constant somewhere visible to the frontend and
backend and I'm trying to avoid adding a header just for it.
2023-04-29 15:04:55 -07:00
Sergei Barannikov
e744e51b12 [SelectionDAG] Rename ADDCARRY/SUBCARRY to UADDO_CARRY/USUBO_CARRY (NFC)
This will make them consistent with other overflow-aware nodes.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D148196
2023-04-29 21:59:58 +03:00
Matt Arsenault
bc37be1855 LangRef: Add "dynamic" option to "denormal-fp-math"
This is stricter than the default "ieee", and should probably be the
default. This patch leaves the default alone. I can change this in a
future patch.

There are non-reversible transforms I would like to perform which are
legal under IEEE denormal handling, but illegal with flushing zero
behavior. Namely, conversions between llvm.is.fpclass and fcmp with
zeroes.

Under "ieee" handling, it is legal to translate between
llvm.is.fpclass(x, fcZero) and fcmp x, 0.

Under "preserve-sign" handling, it is legal to translate between
llvm.is.fpclass(x, fcSubnormal|fcZero) and fcmp x, 0.

I would like to compile and distribute some math library functions in
a mode where it's callable from code with and without denormals
enabled, which requires not changing the compares with denormals or
zeroes.

If an IEEE function transforms an llvm.is.fpclass call into an fcmp 0,
it is no longer possible to call the function from code with denormals
enabled, or write an optimization to move the function into a denormal
flushing mode. For the original function, if x was a denormal, the
class would evaluate to false. If the function compiled with denormal
handling was converted to or called from a preserve-sign function, the
fcmp now evaluates to true.

This could also be of use for strictfp handling, where code may be
changing the denormal mode.

Alternative name could be "unknown".

Replaces the old AMDGPU custom inlining logic with more conservative
logic which tries to permit inlining for callees with dynamic handling
and avoids inlining other mismatched modes.
2023-04-29 08:44:59 -04:00