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1457 Commits

Author SHA1 Message Date
Rafael Espindola
f034b6e4c2 Remove -f128:128 from the DataLayout strings. It is the default. 
llvm-svn: 197504
 2013-12-17 16:07:35 +00:00
Rafael Espindola
12256302cf The PS3 is a ppc64 and has 64 bit registers. Update DataLayout accordingly. 
llvm-svn: 197502
 2013-12-17 15:40:00 +00:00
Rafael Espindola
26c67b7879 Remove -f16:16:32 from the XCore DataLayout string. 
This makes it identical to the string llvm produces.

llvm-svn: 197500
 2013-12-17 14:34:42 +00:00
Rafael Espindola
8ddf8bce91 Reorder these DataLayout entries to match the order LLVM uses. 
This completes the cleanup/refactoring of DataLayout on the clang side. Next
is figuring out the differences between the llvm and clang produced strings

llvm-svn: 197442
 2013-12-17 00:04:48 +00:00
Rafael Espindola
2da3532aba The preferred alignment defaults to the ABI one. Omit it if it is the same. 
llvm-svn: 197440
 2013-12-16 23:27:41 +00:00
Rafael Espindola
91b0cbf3fc Remove another default I missed before. 
llvm-svn: 197437
 2013-12-16 23:03:23 +00:00
Rafael Espindola
04c685b5e4 Clang DataLayout string cleanup: don't print other defaults. 
I missed these in previous commits.

llvm-svn: 197435
 2013-12-16 22:50:41 +00:00
Rafael Espindola
7f53473de7 Remove dead data. 
The f80:128:128 was followed by a f80:32:32 and so never used. Looks like this
was there since r91746.

llvm-svn: 197433
 2013-12-16 22:15:35 +00:00
Rafael Espindola
47debc0136 Clang DataLayout string cleanup: don't print the pointer defaults. 
llvm-svn: 197430
 2013-12-16 21:59:14 +00:00
Rafael Espindola
61a69257a4 Clang DataLayout string cleanup: don't print the aggregate defaults. 
llvm-svn: 197429
 2013-12-16 21:51:30 +00:00
Rafael Espindola
8a91f2fd85 Clang DataLayout string cleanup: don't print the vector defaults. 
llvm-svn: 197427
 2013-12-16 21:38:22 +00:00
Rafael Espindola
20b0d92767 Clang DataLayout string cleanup: don't print the FP defaults. 
llvm-svn: 197422
 2013-12-16 20:34:33 +00:00
Rafael Espindola
32083d503b Clang DataLayout string cleanup: don't print the integer defaults. 
llvm-svn: 197421
 2013-12-16 20:21:07 +00:00
Rafael Espindola
bf34990ed9 Delete dead code. 
This is always overwritten by the one in NaClTargetInfo.

llvm-svn: 197346
 2013-12-15 17:21:28 +00:00
Rafael Espindola
49806f4dbe Delete dead code. 
llvm-svn: 197270
 2013-12-13 20:27:54 +00:00
Rafael Espindola
f62bcc0d9c Use a: and s: instead of a0: and s0: in the DataLayout strings. 
They are equivalent and the size of 'a' and 's' is unused.

llvm-svn: 197256
 2013-12-13 18:40:15 +00:00
Tim Northover
8f24b178f3 ARM: teach Sema that "r" can match 64-bit values 
We already support using "r" on 64-bit values (a GPRPair is
allocated), but Sema doesn't know this yet so issues a warning. This
should fix it.

llvm-svn: 196724
 2013-12-08 15:24:55 +00:00
Ana Pazos
dd6068d400 Added support for mcpu krait 
- krait processor currently modeled with the same features as A9.
- Krait processor additionally has VFP4 (fused multiply add/sub)
and hardware division features enabled.
- krait has currently the same Schedule model as A9
- krait cpu flag is not recognized by the GNU assembler yet,
it is replaced with march=armv7-a to avoid a lower march
from being used.

llvm-svn: 196618
 2013-12-06 22:43:17 +00:00
Joerg Sonnenberger
fbd51bef13 Assume ARMv6 for NetBSD for now for strex/ldrex. 
llvm-svn: 196115
 2013-12-02 16:12:05 +00:00
Joerg Sonnenberger
7c7fcec329 NetBSD uses long derived size_t / ssize_t in all ARM ABIs. 
llvm-svn: 196114
 2013-12-02 16:09:34 +00:00
Joerg Sonnenberger
84c7ca8851 NetBSD uses signed wchar_t on ARM platforms. 
llvm-svn: 195970
 2013-11-30 00:38:16 +00:00
Richard Barton
3b82ed3948 Add support for Cortex-A12. 
Patch by Oliver Stannard!

llvm-svn: 195449
 2013-11-22 11:53:28 +00:00
Tim Northover
5bb34ca4df ARM: define & use __ARM_NEON on ARM32 (as per ACLE) 
There seem to be quite a few references to the old macro __ARM_NEON__ on the
internet, so I don't think it's a good idea to remove it entirely (at least
yet), but the canonical name does not have the trailing underscores so we
should use that ourselves.

llvm-svn: 195353
 2013-11-21 12:36:34 +00:00
Jim Grosbach
e2bfac497d ARM: embedded v7 'darwin' doesn't get min-version defines. 
Make sure armv7 doesn't get the iOS deployment version definitions when
it's being used for non-iOS.

rdar://15497681

llvm-svn: 195149
 2013-11-19 20:18:39 +00:00
Jiangning Liu
c8b0a1ad95 Clean up predefined macros for AArch64 to follow ACLE 2.0. 
llvm-svn: 195068
 2013-11-19 01:33:17 +00:00
Tom Stellard
5558304ba2 R600: Add processor type for Hawaii 
llvm-svn: 194751
 2013-11-14 23:45:53 +00:00
Daniel Sanders
8b59af15ed [mips][msa] Enable inlinse assembly for MSA. 
Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier:
  asm ("ldi.w %w0, 1", "=f"(result));

Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended
output. This is a consequence of differences in the internal handling of
the registers in each compiler. To be source-compatible between the
compilers, users must use the 'w' print-modifier.

MSA registers (including control registers) are supported in clobber lists.

llvm-svn: 194476
 2013-11-12 12:56:01 +00:00
Robert Lytton
cc4246614f XCore target Type defines. 
Change SizeType, PtrDiffType, IntPtrType, WCharType, WIntType
to follow the XMOS llvm-gcc front end's settings.

llvm-svn: 194461
 2013-11-12 10:09:30 +00:00
Akira Hatanaka
c4baedd71d [mips] Partially revert r193640. Stack alignment should not be determined by 
the floating point register mode.

llvm-svn: 194426
 2013-11-11 22:10:46 +00:00
Tim Northover
e77f78cbad Darwin(ish): we don't want __ARM_EABI__ even on v7a embedded targets. 
llvm-svn: 194408
 2013-11-11 19:11:22 +00:00
Joerg Sonnenberger
0e921f2bd9 NetBSD 6.99.26 switched to default rounding mode, so adjust 
__FLT_EVAL_METHOD__ accordingly. Add test case for this and the SSE2
variances on NetBSD.

llvm-svn: 194377
 2013-11-11 14:00:37 +00:00
Benjamin Kramer
d9a5e2a490 Driver: Add support for -march=bdver3 on x86. 
llvm-svn: 193985
 2013-11-04 10:29:51 +00:00
Amara Emerson
703da2ea98 [AArch64] Add some CPU targets for "generic", A-53 and A-57. 
Enables the clang driver to begin targeting specific CPUs. Introduced a
"generic" CPU which will ensure that the optional FP feature is enabled
by default when it gets to LLVM, without needing any extra arguments.
Cortex-A53 and A-57 are also introduced with tests, although backend
handling of them does not yet exist.

llvm-svn: 193740
 2013-10-31 09:32:33 +00:00
Akira Hatanaka
babd67e6ce [mips] Delete unused functions. 
llvm-svn: 193674
 2013-10-30 02:38:17 +00:00
Akira Hatanaka
618b29813a [mips] Align the stack to 16-bytes for -mfp64. 
llvm-svn: 193640
 2013-10-29 19:00:35 +00:00
Akira Hatanaka
9064e36551 [mips] Move setDescriptionString to base class MipsTargetInfoBase and call it 
at the end of handleTargetFeatures.

No intended functionality change.

llvm-svn: 193636
 2013-10-29 18:30:33 +00:00
Tom Stellard
08ded12ffb R600: Add Sea Islands GPUs 
llvm-svn: 193622
 2013-10-29 16:38:29 +00:00
Bernard Ogden
18b5701a68 ARM: Add -m[no-]crc to dis/enable CRC subtargetfeature from clang 
Allow users to disable or enable CRC subtarget feature.

Differential Revision: http://llvm-reviews.chandlerc.com/D2037

llvm-svn: 193600
 2013-10-29 09:47:51 +00:00
Bernard Ogden
da13af380a Add driver support for FP, SIMD and crypto defaults. 
Although we wire up a bit for v8fp for macro setting
purposes, we don't set a macro yet. Need to ask list
about that.

Change-Id: Ic9819593ce00882fbec72757ffccc6f0b18160a0
llvm-svn: 193367
 2013-10-24 18:32:51 +00:00
Bernard Ogden
58a05cff97 Clean up char/numeric comparisons in ARM getTargetDefines 
Change-Id: Ie07228411b68252adcd5cf80b27ccd2eb3b031d9
llvm-svn: 193366
 2013-10-24 18:32:44 +00:00
Bernard Ogden
021d7dacd0 Teach clang driver about Cortex-A53 and Cortex-A57. 
Adds some Cortex-A53 strings where they were missing before.
Cortex-A57 is entirely new to clang.

Doesn't touch code only used by Darwin, in consequence of which
one of the A53 lines has been removed.

Change-Id: I5edb58f6eae93947334787e26a8772c736de6483
llvm-svn: 193364
 2013-10-24 18:32:36 +00:00
Tim Northover
901dee4d28 ARM-Darwin: Use the *-*-darwin-eabi triple for v6m & v7m archs 
These arch arguments are used for embedded targets (obviously) which need a
different calling convention to iOS.

llvm-svn: 193328
 2013-10-24 10:48:50 +00:00
Silviu Baranga
e5690463e2 Set the default hardware division features for ARM cpus. Also set it as default for A32 armv8. 
llvm-svn: 193075
 2013-10-21 10:59:33 +00:00
Silviu Baranga
f9671dd09d Add the __ARM_ARCH_EXT_IDIV__ predefine. It is set to 1 if we have hardware divide in the mode that we are compiling in (depending on the target features), not defined if we don't. Should be compatible with the GCC conterpart. Also adding a -hwdiv option to overide the default behavior. 
llvm-svn: 193074
 2013-10-21 10:54:53 +00:00
Simon Atanasyan
2c97a81e81 [Mips] Define __mips_fpr and _MIPS_FPSET macros. 
llvm-svn: 192969
 2013-10-18 13:13:53 +00:00
Eric Christopher
3ff21b3195 Rename HandleTargetFeatures->handleTargetFeatures to match 
everything else in the class.

llvm-svn: 192851
 2013-10-16 21:26:26 +00:00
Eric Christopher
2fe3b4a490 Add preprocessor support for powerpc vsx. 
The test should be expanded upon for more powerpc checking.

llvm-svn: 192849
 2013-10-16 21:19:26 +00:00
Eric Christopher
c04fe09c1d Fix comments. 
llvm-svn: 192847
 2013-10-16 21:19:19 +00:00
Yunzhong Gao
6108936fa6 Enabling 3DNow! prefetch instruction support for a few AMD processors in the 
clang front end. This change will allow the __PRFCHW__ macro to be set on these
processors and hence include prfchwintrin.h in x86intrin.h header. Support for
the intrinsic itself seems to have already been added in r178041.

Differential Revision: http://llvm-reviews.chandlerc.com/D1934

llvm-svn: 192829
 2013-10-16 19:07:02 +00:00
Nick Lewycky
50e8f480ea Add support for -mcx16, and predefine __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 when 
it is enabled. Also enable it on the same architectures that GCC does.

llvm-svn: 192045
 2013-10-05 20:14:27 +00:00