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17 Commits

Author SHA1 Message Date
Mircea Trofin
cdfd4c5c1a [NFC] Removed unused prefixes in test/CodeGen/AMDGPU 
More patches to follow. This covers the pertinent tests starting with e,
f, and g.

Differential Revision: https://reviews.llvm.org/D94124
 2021-01-05 19:18:30 -08:00
Cameron McInally
31c7a2fd5c [FPEnv] Don't transform FSUB(-0,X)->FNEG(X) in SelectionDAGBuilder. 
This patch stops unconditionally transforming FSUB(-0,X) into an FNEG(X) while building the DAG. There is also one small change to handle the new FSUB(-0,X) similarly to FNEG(X) in the AMDGPU backend.

Differential Revision: https://reviews.llvm.org/D84056
 2020-08-03 10:22:25 -05:00
dfukalov
aa77232a63 [NFC][AMDGPU] Improve fused fmul+fadd tests. 
Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D84903
 2020-07-31 04:00:09 +03:00
dfukalov
7520393842 [NFC] Fixed typo in tests parameters 
Summary:
llc reports `fp32-denormals` is not recognized. I guess it was intended to be
`-denormal-fp-math-f32={preserve-sign|ieee} -mattr=+mad-mac-f32-insts`

Reviewers: rampitec

Reviewed By: rampitec

Subscribers: jvesely, nhaehnle, llvm-commits, kerbowa

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83883
 2020-07-15 22:09:01 +03:00
Stanislav Mekhanoshin
9ee272f13d [AMDGPU] Add gfx1030 target 
Differential Revision: https://reviews.llvm.org/D81886
 2020-06-15 16:18:05 -07:00
Jonathan Roelofs
7c5d2bec76 [llvm] Fix missing FileCheck directive colons 
https://reviews.llvm.org/D77352
 2020-04-06 09:59:08 -06:00
Matt Arsenault
5660bb6bc9 AMDGPU: Remove denormal subtarget features 
Switch to using the denormal-fp-math/denormal-fp-math-f32 attributes.
 2020-04-02 17:17:12 -04:00
Matt Arsenault
0084adc516 AMDGPU: Add Vega12 and Vega20 
Changes by
  Matt Arsenault
  Konstantin Zhuravlyov

llvm-svn: 331215
 2018-04-30 19:08:16 +00:00
Matt Arsenault
878827d93a DAG: Fold fma (fneg x), K, y -> fma x, -K, y 
llvm-svn: 316753
 2017-10-27 09:06:07 +00:00
Matt Arsenault
6c29c5acfe AMDGPU: Allow SIShrinkInstructions to work in non-SSA 
Immediates can be folded as long as the immediate is a vreg.

Also undo commuting instructions if it didn't fold an immediate.

llvm-svn: 307575
 2017-07-10 19:53:57 +00:00
Alexander Timofeev
982aee6a38 [AMDGPU] Switch scalarize global loads ON by default 
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307097
 2017-07-04 17:32:00 +00:00
NAKAMURA Takumi
e4a741376b Revert r307026, "[AMDGPU] Switch scalarize global loads ON by default" 
It broke a testcase.

  Failing Tests (1):
      LLVM :: CodeGen/AMDGPU/alignbit-pat.ll

llvm-svn: 307054
 2017-07-04 02:14:18 +00:00
Alexander Timofeev
ea7f08bee5 [AMDGPU] Switch scalarize global loads ON by default 
Differential revision: https://reviews.llvm.org/D34407

llvm-svn: 307026
 2017-07-03 14:54:11 +00:00
Chad Rosier
84a238dd62 [DAGCombine] Transform (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)). 
Differential Revision: http://reviews.llvm.org/D32596

llvm-svn: 302153
 2017-05-04 14:14:44 +00:00
Matt Arsenault
3dbeefa978 AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel 
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444
 2017-03-21 21:39:51 +00:00
Matt Arsenault
e7d8ed32f9 AMDGPU: Swap order of operands in fadd/fsub combine 
FMA is canonicalized to constant in the middle operand. Do
the same so fmad matches and avoid an extra combine step.

llvm-svn: 290313
 2016-12-22 04:03:40 +00:00
Matt Arsenault
770ec8680a AMDGPU: Form more FMAs if fusion is allowed 
Extend the existing fadd/fsub->fmad combines to produce
FMA if allowed.

llvm-svn: 290311
 2016-12-22 03:55:35 +00:00