4656 Commits

Author SHA1 Message Date
Florian Hahn
9ba5244273
[LV] Add option to still enable the legacy cost model. (#99536)
This patch adds a new temporary option to still use the legacy cost
model after https://github.com/llvm/llvm-project/pull/92555. It defaults
to false and the only intended use is to adjust the default to true in
the soon-to-be-cut release branch.

PR: https://github.com/llvm/llvm-project/pull/99536
2024-07-19 18:48:15 +01:00
Alexey Bataev
f6e01b9ece [SLP]Do not trunc bv nodes, if the user is vectorized an requires wider type.
If at least a single user of the gathered trunc'ed instruction is
vectorized and requires wider type, than the trunc node, such
gathers/buildvectors should not be optimized for better bitwidth.
2024-07-19 07:28:04 -07:00
Yangyu Chen
007aa6d1b2
[SLP] Increase UsesLimit to 64 (#99467)
Since commit 82b800ecb35fb46881aa52000fa40b1b99aa654e addressed the
issue #99327 , we see some performance regression (13%) on some
verilator generated C++ code. This is because the UsesLimit is set to 8,
which is too small for the verilator generated code. I have analyzed the
need for the UsesLimit from [1] and found that the UsesLimit should be
at least 64 to cover most of these cases. Thus, This patch increases the
UsesLimit to 64.

Link:
https://github.com/llvm/llvm-project/issues/99327#issuecomment-2236052879
[1]

Signed-off-by: Yangyu Chen <cyy@cyyself.name>
2024-07-19 20:32:28 +08:00
Florian Hahn
008df3cf85
[LV] Check isPredInst instead of isScalarWithPred in uniform analysis. (#98892)
Any instruction marked as uniform will result in a uniform
VPReplicateRecipe. If it requires predication, it will be placed in a
replicate region, even if isScalarWithPredication returns false.

Check isPredicatedInst instead of isScalarWithPredication to avoid
generating uniform VPReplicateRecipes placed inside a replicate region.
This fixes an assertion when using scalable VFs.

Fixes https://github.com/llvm/llvm-project/issues/80416. 
Fixes https://github.com/llvm/llvm-project/issues/94328.
Fixes https://github.com/llvm/llvm-project/issues/99625.

PR: https://github.com/llvm/llvm-project/pull/98892
2024-07-19 12:02:25 +01:00
Florian Hahn
b8741cc185
[VPlan] Relax assertion retrieving a scalar from VPTransformState::get.
The current assertion VPTransformState::get when retrieving a single
scalar only does not account for cases where a def has multiple users,
some demanding all scalar lanes, some demanding only a single scalar.

For an example, see the modified test case. Relax the assertion by also
allowing requesting scalar lanes only when the Def doesn't have only its
first lane used.

Fixes https://github.com/llvm/llvm-project/issues/88849.
2024-07-19 11:33:57 +01:00
Philip Reames
ded35c0c3a
[vectorcombine] Pull sext/zext through reduce.or/and/xor (#99548)
This extends the existing foldTruncFromReductions transform to handle
sext and zext as well. This is only legal for the bitwise reductions
(and/or/xor) and not the arithmetic ones (add, mul). Use the same
costing decision to drive whether we do the transform.
2024-07-18 13:56:40 -07:00
Craig Topper
52d947b5c1 [LV] Remove unnecessary variable from InnerLoopVectorizer::createBitOrPointerCast. NFC
DstVTy is already a VectorType, we don't need to cast it again. This
used to be a cast to FixedVectorType that was changed to support
scalable vectors.
2024-07-18 12:54:40 -07:00
Florian Hahn
371777695f
[LV] Assert uniform recipes don't get predicated for when vectorizing.
Add assertion ensuring invariant on construction, split off as suggested
from https://github.com/llvm/llvm-project/pull/98892.
2024-07-18 17:43:51 +01:00
Alexey Bataev
1a80153ba9
[LV][NFC]Simplify the structure and improve message of safe distance analysis for scalable vectorization. (#99487) 2024-07-18 10:11:39 -04:00
Han-Kuan Chen
39bb244a16
[SLP][REVEC] Make Instruction::Call support vector instructions. (#99317) 2024-07-18 20:49:53 +08:00
Han-Kuan Chen
b634e057dd
[SLP][REVEC] Fix false assumption of the source for castToScalarTyElem. (#99424)
The argument V may come from adjustExtracts, which is the vector operand
of ExtractElementInst. In addition, it is not existed in getTreeEntry.

The vector operand of ExtractElementInst may have a type of <1 x Ty>,
ensuring that the number of elements in ScalarTy and VecTy are equal.

reference: https://github.com/llvm/llvm-project/issues/99411
2024-07-18 19:54:46 +08:00
Alexey Bataev
82b800ecb3 [SLP][NFC]Limit number of the external uses analysis, NFC.
BoUpSLP::buildExternalUses runs through all the users of the vectorized
scalars, which may require significant amount of time, if there are too
many users. Limited the analysis, if there are too many users, all of
them are replaced, not individually.
2024-07-17 14:12:22 -07:00
Florian Hahn
2bb65660ae
[LV] Allow re-processing of operands of instrs feeding interleave group
Follow up to d216615518 to update dead interleave group pointer detection
to allow re-processing of operands of instructions determined to only feed
interleave groups.

This is needed because instructions feeding interleave group pointers
can become dead in any order, as per the newly added test case.
2024-07-17 21:37:28 +01:00
Alexey Bataev
c5c1bd164f [SLP]Improve minbitwidth analysis for trun'ed gather nodes.
If the gather node is trunc'ed, better to trunc scalars and then gather
them rather than gather and then trunc. Trunc for scalars is free in
most cases.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/99072
2024-07-17 07:41:00 -07:00
Alexey Bataev
05b067b5f9 Revert "[SLP]Improve minbitwidth analysis for trun'ed gather nodes."
This reverts commit d3d2f9a4208eedbd2f372c34725ab61c3f4d3aed to fix
buildbot https://lab.llvm.org/buildbot/#/builders/92/builds/1880.
2024-07-17 07:31:27 -07:00
Alexey Bataev
d3d2f9a420 [SLP]Improve minbitwidth analysis for trun'ed gather nodes.
If the gather node is trunc'ed, better to trunc scalars and then gather
them rather than gather and then trunc. Trunc for scalars is free in
most cases.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/99072
2024-07-17 07:29:02 -07:00
Florian Hahn
75b3ddf23b
[VPlan] Use State.VF in vectorizeInterleaveGroup (NFCI).
Update vectorizeInterleaveGroup to use State.VF in preparation to moving
the code directly to the recipe.
2024-07-17 14:30:19 +01:00
Alexey Bataev
b05ccaf451 Revert "[SLP]Improve minbitwidth analysis for trun'ed gather nodes."
This reverts commit 6425f2d66740b84fc3027b649cd4baf660c384e8 to fix the
buildbost issues reported in https://lab.llvm.org/buildbot/#/builders/95/builds/1404.
2024-07-17 05:51:54 -07:00
Han-Kuan Chen
1813ffd6b2
[SLP][REVEC] Make SLP support revectorization (-slp-revec) and add simple test. (#98269)
This PR will make SLP support revectorization. Add an option -slp-revec
to control the functionality.

reference:

https://discourse.llvm.org/t/rfc-make-slp-vectorizer-revectorize-vector-instructions/79436
2024-07-17 20:14:12 +08:00
Alexey Bataev
6425f2d667
[SLP]Improve minbitwidth analysis for trun'ed gather nodes.
If the gather node is trunc'ed, better to trunc scalars and then gather
them rather than gather and then trunc. Trunc for scalars is free in
most cases.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/99072
2024-07-17 07:17:25 -04:00
Alexey Bataev
8156be684d
[LV][NFC]Introduce isScalableVectorizationAllowed() to refactor getMaxLegalScalableVF().
Adds isScalableVectorizationAllowed() and the corresponding data member
to query if the scalable vectorization is supported rather than
performing the analysis each time the scalable vector factor is
requested.

Part of https://github.com/llvm/llvm-project/pull/91403

Reviewers: ayalz, fhahn

Reviewed By: fhahn, ayalz

Pull Request: https://github.com/llvm/llvm-project/pull/98916
2024-07-17 07:16:13 -04:00
Florian Hahn
d216615518
[LV] Process dead interleave pointer ops in reverse order.
Process dead interleave pointer ops in reverse order. This also catches
cases where the same base pointer is used by multiple different
interleave groups.

This fixes another case where the legacy cost model inaccuarately
estimates cost, surfaced by b841e2eca3b5c8.
2024-07-17 11:43:42 +01:00
Sjoerd Meijer
c5329c827a
[LV][AArch64] Prefer Fixed over Scalable if cost-model is equal (Neoverse V2) (#95819)
For the Neoverse V2 we would like to prefer fixed width over scalable
    vectorisation if the cost-model assigns an equal cost to both for certain
    loops. This improves 7 kernels from TSVC-2 and several production kernels by
    about 2x, and does not affect SPEC21017 INT and FP. This also adds a new TTI
    hook that can steer the loop vectorizater to preferring fixed width
    vectorization, which can be set per CPU. For now, this is only enabled for the
    Neoverse V2.

    There are 3 reasons why preferring NEON might be better in the case the
    cost-model is a tie and the SVE vector size is the same as NEON (128-bit):
    architectural reasons, micro-architecture reasons, and SVE codegen reasons. The
    latter will be improved over time, so the more important reasons are the former
    two. I.e., (micro) architecture reason is the use of LPD/STP instructions which
    are not available in SVE2 and it avoids predication.

    For what it is worth: this codegen strategy to generate more NEON is inline
    with GCC's codegen strategy, which is actually even more aggressive in
    generating NEON when no predication is required. We could be smarter about the
    decision making, but this seems to be a first good step in the right direction,
    and we can always revise this later (for example make the target hook more
    general).
2024-07-17 10:46:28 +01:00
Florian Hahn
cf673604c1
[LV] Use VF from selected plan when creating InnerLoopVectorizer.
This makes sure the same VF is used when executing the plan and in the
functions in InnerLoopVectorizer when the assertion is disabled (e.g.
release builds).

No tests added as they would trigger an assertion.
2024-07-17 10:29:58 +01:00
Alexey Bataev
15915c06d5
[SLP]Do not vectorize small (<=2) buildvector/buildvalue sequences with MaxVF==true.
If MaxVFOnly for buildvector/buildvalue vectorization is set to true and the
total number of elements to vectorize is <= 2, better to try to
vectorize reductions at first, which may produce larger tree (reductions
have a limit of at least 4 elements to vectorize). Smaller
buildvector/buildvalue sequence will be attempted to vectorize later,
with MaxVFOnly set to false.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/98957
2024-07-16 12:45:58 -04:00
Alexey Bataev
8ff233f4f1 [SLP]Correctly detect minnum/maxnum patterns for select/cmp operations on floats.
The patch enables detection of minnum/maxnum patterns for float point
instruction, represented as select/cmp. Also, enables better cost
estimation for integer min/max patterns since the compiler starts
to estimate the scalars separately.

Reviewers: nikic, RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/98570
2024-07-16 09:42:08 -07:00
Alexey Bataev
c3540d0b6b Revert "[SLP]Correctly detect minnum/maxnum patterns for select/cmp operations on floats."
This reverts commit c7aac38c29f564bc48f7cfb71d3b3b8b482c873b to fix
crashes reavealed by the buildbot in https://lab.llvm.org/buildbot/#/builders/168/builds/1104.
2024-07-16 05:59:59 -07:00
Florian Hahn
7e2b5e233a
[LV] Move reportVectorizationInfo to LoopVectorize.cpp (NFC)
The function is only used in LoopVectorize.cpp, no need to define it in
header.
2024-07-16 13:47:12 +01:00
Alexey Bataev
c7aac38c29
[SLP]Correctly detect minnum/maxnum patterns for select/cmp operations on floats.
The patch enables detection of minnum/maxnum patterns for float point
instruction, represented as select/cmp. Also, enables better cost
estimation for integer min/max patterns since the compiler starts
to estimate the scalars separately.

Reviewers: nikic, RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/98570
2024-07-16 08:14:27 -04:00
Florian Hahn
cc97a0d347
[LV] Use getBestPlan when interleaving only. (NFCI)
Use the getBestPlan() utility added in b841e2eca3 to also get the
scalar plan when interleaving only.
2024-07-16 12:00:49 +01:00
Mel Chen
4eb30cfb34
[LV][EVL] Support in-loop reduction using tail folding with EVL. (#90184)
Following from #87816, add VPReductionEVLRecipe to describe vector
predication reduction.

Address one of TODOs from #76172.
2024-07-16 16:15:24 +08:00
Simon Pilgrim
da286c8bf6
[VectorCombine] foldShuffleToIdentity - peek through bitcasts to see if they come from the same value to form identity sequence (#98334)
Workaround until I can get #96884 fixed properly - when trying to find identity sequences, peek through any bitcasts to see if the values all came from the same source. We don't run CSE frequently enough to merge all the bitcasts that we end up with.
2024-07-15 21:36:23 +01:00
Alexey Bataev
beccecaacd [SLP]Fix PR98838: do no replace condition of select-based logical op by poison.
If the reduction operation is a select-based logical op, the condition
should be replaced by the poison, better to replace by the non-poisoning
constant to prevent poison propagation in the vector code.

Fixes https://github.com/llvm/llvm-project/issues/98838
2024-07-15 07:27:54 -07:00
Florian Hahn
fc9cd3272b
[VPlan] Don't add live-outs for IV phis.
Resume and exit values for inductions are currently still created
outside of VPlan and independent of the induction recipes. Don't add
live-outs for now, as the additional unneeded users can pessimize other
anlysis.

Fixes https://github.com/llvm/llvm-project/issues/98660.
2024-07-14 20:49:03 +01:00
Alexey Bataev
9e261c5bee [SLP]Do not salvage debug info from instructions, marked for deletion already.
If the instruction was processed already for the deletion, no need to
process it second time, it may cause compiler crash.
2024-07-12 08:08:50 -07:00
Mel Chen
a00754bb2a
[LV] Fix the cost of min/max reductions. (#98453)
This patch updates the function `getReductionPatternCost` to handle the
cost of min/max reductions by `TTI.getMinMaxReductionCost`.
2024-07-12 13:47:33 +08:00
Florian Hahn
7a49d80f58
[VPlan] Skip users outside loop in check for exit pre-compute candidates
When collecting candidates to pre-compute cost for operands of exit
conditions, skip users outside the loop when checking if they are in
ExistInstrs. The users outside the loop should be ignored, as they won't
make a value live in the VPlan.

This fixes a failure when building for X86 with sanitizers on macOS
after b841e2eca3b5c
(https://green.lab.llvm.org/job/llvm.org/job/clang-stage2-cmake-RgSan/287/)
2024-07-11 22:04:39 +01:00
Alexey Bataev
01a9888694 [SLP][NFC]Add isGather() function and use it instead direct comparison, NFC. 2024-07-11 11:56:32 -07:00
Graham Hunter
22a7f6dcc4
Revert "[LV] Autovectorization for the all-in-one histogram intrinsic" (#98493)
Reverts llvm/llvm-project#91458 to deal with post-commit reviewer
requests.
2024-07-11 16:39:30 +01:00
Florian Hahn
9a5a8731e7
[VPlan] Introduce ResumePhi VPInstruction, use to create phi for FOR. (#94760)
This patch introduces a new ResumePhi VPInstruction which creates a phi
in a leaf block of a VPlan. The first use is to create the phi node for
fixed-order recurrence resume values in the scalar preheader.

The VPInstruction takes 2 operands: 1) the incoming value from the
middle-block and a default value to be used for all other incoming
blocks.

In follow-up changes, it will also be used to create phis for reduction
and induction resume values.

Depends on https://github.com/llvm/llvm-project/pull/92651

PR: https://github.com/llvm/llvm-project/pull/94760
2024-07-11 16:08:04 +01:00
Graham Hunter
1860fd049e
[LV] Autovectorization for the all-in-one histogram intrinsic (#91458)
This patch implements limited loop vectorization support for the 'all-in-one' histogram intrinsic. The feature is disabled by default, and when enabled will only vectorize if there are no other users of values in the gather-modify-scatter sequence.
2024-07-11 15:33:30 +01:00
Florian Hahn
2267191072
[LV] Add missing check, drop 'then'.
Address post-commit comments for 67f4968a577.
2024-07-11 15:21:33 +01:00
Florian Hahn
67f4968a57
[LV] Skip cost for ZExt/SExts that will be removed by truncating ops.
If an extend is truncated, it will be removed if the result type is <=
the source type, as there is nothing to extend. Return a cost of 0.

This was caught by the first step to perform cost-modeling based on
VPlan (b841e2e), as the legacy cost model would query the cost of an
invalid extend, while the extend has been folded away by VPlan
transforms.

Fixes https://github.com/llvm/llvm-project/issues/98413.
2024-07-11 11:40:14 +01:00
Florian Hahn
88e9c56990
[LV] Don't adjust name of recurrence phi in scalar loop (NFC).
Adjusting the name of the recurrence phi in the scalar loop is a bit
inconsistent, as we do not adjust any other names in the scalar loops
(including other phis).

Remove this adjustment in preparation for
https://github.com/llvm/llvm-project/pull/94760/ and as discussed there.
2024-07-10 18:37:35 +01:00
Florian Hahn
b841e2eca3
Recommit "[VPlan] First step towards VPlan cost modeling. (#92555)"
This reverts commit 6f538f6a2d3224efda985e9eb09012fa4275ea92.

A number of crashes have been fixed by separate fixes, including
ttps://github.com/llvm/llvm-project/pull/96622. This version of the
PR also pre-computes the costs for branches (except the latch) instead
of computing their costs as part of costing of replicate regions, as
there may not be a direct correspondence between original branches and
number of replicate regions.

Original message:
This adds a new interface to compute the cost of recipes, VPBasicBlocks,
VPRegionBlocks and VPlan, initially falling back to the legacy cost model
for all recipes. Follow-up patches will gradually migrate recipes to
compute their own costs step-by-step.

It also adds getBestPlan function to LVP which computes the cost of all
VPlans and picks the most profitable one together with the most
profitable VF.

The VPlan selected by the VPlan cost model is executed and there is an
assert to catch cases where the VPlan cost model and the legacy cost
model disagree. Even though I checked a number of different build
configurations on AArch64 and X86, there may be some differences
that have been missed.

Additional discussions and context can be found in @arcbbb's
https://github.com/llvm/llvm-project/pull/67647 and
https://github.com/llvm/llvm-project/pull/67934 which is an earlier
version of the current PR.

PR: https://github.com/llvm/llvm-project/pull/92555
2024-07-10 14:22:21 +01:00
Alexey Bataev
3742c2a83c [SLP]Use stored signedness after minbitwidth analysis.
Need to used stored signedness info for the root node instead of
recalculating it after the vectorization, which may lead to a compiler
crash.
2024-07-10 03:58:00 -07:00
Han-Kuan Chen
ac299ed2c7
[SLP] Provide an universal interface for FixedVectorType::get. NFC. (#96845)
SLP vectorizes scalar type to vector type. In the future, we will try to
make SLP vectorizes vector type to vector type. We add a getWidenedType
as a helper function. For example, SLP will make the following code

%v0 = load i32, ptr %in0, align 4
%v1 = load i32, ptr %in1, align 4
%v2 = load i32, ptr %in2, align 4
%v3 = load i32, ptr %in3, align 4

into a load <4 x i32>. The ScalarTy is i32 and VF is 4. In the future,
SLP will make the following code

%v0 = load <4 x i32>, ptr %in0, align 4
%v1 = load <4 x i32>, ptr %in1, align 4
%v2 = load <4 x i32>, ptr %in2, align 4
%v3 = load <4 x i32>, ptr %in3, align 4

into a load <16 x i32>. The ScalarTy is <4 x i32> and VF is 4.

reference:
https://discourse.llvm.org/t/rfc-make-slp-vectorizer-revectorize-vector-instructions/79436
2024-07-10 11:50:35 +08:00
Alexey Bataev
af21bc1917 [SLP]Fix a crash on attempt to revectorize vectorized phi.
If the PHI node is vectorized during vectorization of its operands, no
need to try to vectorize its operands once again.
2024-07-09 14:11:08 -07:00
Florian Hahn
ef89e3efa9
[VPlan] Collect ephemeral values for VPlan.
Port collectEphemeralValues to VPlan as collectEphemeralRecipesForVPlan,
use it in willGenerateVectors. This fixes a regression caused by
29b8b72117 for loops where the only vector values are ephemeral.
2024-07-09 21:34:49 +01:00
Alexey Bataev
822a818786 [SLP][NFC]Add comments for the code, NFC. 2024-07-09 10:06:34 -07:00