3 Commits

Author SHA1 Message Date
Craig Topper
bf684a97f3
[RISCV] Don't emit vxrm writes for vnclip(u).wi with shift of 0. (#76578)
If there's no shift being performed, the rounding mode doesn't matter.

We could do the same for vssra and vssrl, but they are no-ops with a
shift of 0 so would be better off being removed earlier.
2024-01-02 09:50:06 -08:00
Craig Topper
4162a9bca4 [RISCV] Cleanup pass initialization.
Remove redundant initializations from pass constructors that were
already being initialized by LLVMInitializeRISCVTarget().
2023-12-07 18:21:38 -08:00
Craig Topper
014390d937
[RISCV] Implement cross basic block VXRM write insertion. (#70382)
This adds a new pass to insert VXRM writes for vector instructions. With
the goal of avoiding redundant writes.

The pass does 2 dataflow algorithms. The first is a forward data flow to
calculate where a VXRM value is available. The second is a backwards
dataflow to determine where a VXRM value is anticipated.

Finally, we use the results of these two dataflows to insert VXRM writes
where a value is anticipated, but not available.

The pass does not split critical edges so we aren't always able to
eliminate all redundancy.

The pass will only insert vxrm writes on paths that always require it.
2023-11-02 14:09:27 -07:00