27827 Commits

Author SHA1 Message Date
DianQK
a58dcc5e08
Reland "[SimplifyCFG] Improve the precision of PtrValueMayBeModified"
This relands commit f890f010f6a70addbd885acd0c8d1b9578b6246f.

The result value of `getelementptr inbounds (TY, null, not zero)` is a poison value.
We can think of it as undefined behavior.
2024-01-25 06:42:14 +08:00
DianQK
a0c1b5bdda
Reland "[SimplifyCFG] Check if the return instruction causes undefined behavior"
This relands commit b6a0be8ce3114d0c57e7a7d6c3c222986ca506ad.

Return undefined to a noundef return value is undefined.

Example:

```
define noundef i32 @test_ret_noundef(i1 %cond) {
entry:
  br i1 %cond, label %bb1, label %bb2
bb1:
  br label %bb2
bb2:
  %r = phi i32 [ undef, %entry ], [ 1, %bb1 ]
  ret i32 %r
}
```
2024-01-25 06:42:14 +08:00
Alexey Bataev
48bbd76587 [SLP]Fix PR79229: Check that extractelement is used only in a single node
before erasing.

Before trying to erase the extractelement instruction, not enough to
check for single use, need to check that it is not used in several nodes
because of the preliminary nodes reordering.
2024-01-24 11:22:22 -08:00
Alexey Bataev
ca654acc16 [SLP]Fix PR79321: SLPVectorizer's PHICompare doesn't provide a strict
weak ordering.

Compared NumUses to meet the reaquirements of the strict weak ordering.
2024-01-24 09:36:25 -08:00
Jeremy Morse
0065d06760
[NFC][DebugInfo] Maintain RemoveDIs flag when attributor creates functions (#79143)
We're using this flag (IsNewDbgInfoFormat) to detect the boundaries in
LLVM of what's treating debug-info as intrinsics (i.e. dbg.value), and
what's using DPValue objects (the non-intrinsic replacement). The
attributor tends to create new wrapper functions and doesn't insert them
into Modules in the usual way, thus we have to manually update that flag
to signal what debug-info mode it's using.

I've added some --try-experimental-debuginfo-iterators RUN lines to
tests that would otherwise crash because of this, so that they're
exercised by our new-debuginfo-iterators buildbot.

NB: there's an attributor test with a dbg.value in it, however
attributes re-order themselves in RemoveDIs mode for various reasons, so
we're going to address that in a different patch.
2024-01-24 15:20:05 +00:00
Florian Hahn
3d91d9613e
[ConstraintElim] Make sure min/max intrinsic results are not poison.
The result of umin may be poison and in that case the added constraints
are not be valid in contexts where poison doesn't cause UB. Only queue
facts for min/max intrinsics if the result is guaranteed to not be
poison.

This could be improved in the future, by only adding the fact when
solving conditions using the result value.

Fixes https://github.com/llvm/llvm-project/issues/78621.
2024-01-24 14:25:55 +00:00
Nikita Popov
90ba33099c
[InstCombine] Canonicalize constant GEPs to i8 source element type (#68882)
This patch canonicalizes getelementptr instructions with constant
indices to use the `i8` source element type. This makes it easier for
optimizations to recognize that two GEPs are identical, because they
don't need to see past many different ways to express the same offset.

This is a first step towards
https://discourse.llvm.org/t/rfc-replacing-getelementptr-with-ptradd/68699.
This is limited to constant GEPs only for now, as they have a clear
canonical form, while we're not yet sure how exactly to deal with
variable indices.

The test llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll gives
two representative examples of the kind of optimization improvement we
expect from this change. In the first test SimplifyCFG can now realize
that all switch branches are actually the same. In the second test it
can convert it into simple arithmetic. These are representative of
common optimization failures we see in Rust.

Fixes https://github.com/llvm/llvm-project/issues/69841.
2024-01-24 15:25:29 +01:00
Nikita Popov
7143b451d7 [JumpThreading] Add test for #79175 (NFC) 2024-01-24 15:03:52 +01:00
Florian Hahn
c83180c124
[ConstraintElim] Add tests for #78621.
Tests with umin where the result may be poison for
https://github.com/llvm/llvm-project/issues/78621.
2024-01-24 11:56:03 +00:00
Nikita Popov
cd7ea4ea65
[LAA] Drop alias scope metadata that is not valid across iterations (#79161)
LAA currently adds memory locations with their original AATags to AST.
However, scoped alias AATags may be valid only within one loop
iteration, while LAA reasons across iterations.

Fix this by determining which alias scopes are defined inside the loop,
and drop AATags that reference these scopes.

Fixes https://github.com/llvm/llvm-project/issues/79137.
2024-01-24 11:20:16 +01:00
Nikita Popov
543cf08636 [PhaseOrdering] Add additional test for #79161 (NFC) 2024-01-24 10:46:11 +01:00
Nikita Popov
a7a1b8b17e
[MSSAUpdater] Handle simplified accesses when updating phis (#78272)
This is a followup to #76819. After those changes, we can still run into
an assertion failure for a slight variation of the test case: When
fixing up MemoryPhis, we map the incoming access to the access of the
cloned instruction -- which may now no longer exist.

Fix this by reusing the getNewDefiningAccessForClone() helper, which
will look upwards for a new defining access in that case.
2024-01-24 10:15:42 +01:00
Jeffrey Byrnes
f709fbb1bb
[SROA] Only try additional vector type candidates when needed (#77678)
f9c2a341b9
causes regressions when we have a slice with integer vector type that is
the same size as the partition, and a ptr load/store slice that is not
the size of the element type.

Ref `vector-promotion.ll:ptrLoadStoreTys`. 

Before the patch, we would only consider `<4 x i32>` as a candidate type
for vector promotion, and would find that it is a viable type for all
the slices.

After the patch, we now add `<2 x ptr>` as a candidate type due to slice
with user `store ptr %val0, ptr %obj, align 8` -- and flag that we
`HaveVecPtrTy`. The pre-existing behavior of this flag results in
removing the viable `<4 x i32>` and keeping only the unviable `<2 x
ptr>`, which results in a failure to promote.

The end result is failing to promote an alloca that was previously
promoted -- this does not appear to be the intent of that patch, which
has the goal of increasing promotions by providing more promotion
opportunities.

This PR preserves this behavior via a simple reorganization of the
implemention: try first the slice types with same size as the partition,
then, if there is no promotable type, try the `LoadStoreTys.`
2024-01-23 17:22:49 -08:00
Jeffrey Byrnes
766e645d8d [SROA] NFC: Precommit test for pull/77678
Change-Id: I6b2346301f9bd840a0adceba4a0d03e9932af245
2024-01-23 16:37:35 -08:00
Jeremy Morse
7fc2592823 [DebugInfo][RemoveDIs] "Final" cleanup for non-instr debug-info (#79121)
Here's a raft of minor fixes for the RemoveDIs project that's replacing
dbg.value intrinsics with DPValue objects, all IMO trivial:
 * When inserting functions or blocks and calling setIsNewDbgInfoFormat,
   do that after setting the Parent pointer, just in case conversion from
   (or to) dbg.value mode is triggered.
 * When transferring DPValues from an empty range in a splice call, don't
   transfer if there are no DPValues attached to the source block at all.
 * stripNonLineTableDebugInfo should drop DPValues.
 * In insertBefore, don't try to transfer DPValues if there aren't any.
2024-01-23 22:52:47 +00:00
Paul Kirth
9d476e1e1a
[clang][FatLTO] Avoid UnifiedLTO until it can support WPD/CFI (#79061)
Currently, the UnifiedLTO pipeline seems to have trouble with several
LTO features, like SplitLTO units, which means we cannot use important
optimizations like Whole Program Devirtualization or security hardening
instrumentation like CFI.

This patch reverts FatLTO to using distinct pipelines for Full LTO and
ThinLTO. It still avoids module cloning, since that was error prone.
2024-01-23 14:04:52 -08:00
Alexey Bataev
bb3e0d7fc3 [SLP]Fix PR79193: skip analysis of gather nodes for minbitwidth.
No need in trying to analyze small graphs with gather node only to avoid
crash.
2024-01-23 12:44:49 -08:00
Florian Hahn
b504e97d92
[IndVars] Add NUW variants to iv-poison.ll and variants with extra uses. 2024-01-23 20:42:50 +00:00
Jeremy Morse
3942027912 [DebugInfo][RemoveDIs] Disable a run-line while investigating a problem
This just reduces coverage for RemoveDIs temporarily, and it's almost
certainly a patch-ordering problem.
2024-01-23 17:14:48 +00:00
Jeremy Morse
4782ac8dd3
[DebugInfo][RemoveDIs] Use splice in Outliner rather than moveBefore (#79124)
This patch replaces a utility in the outliner that moves the contents of
one basic block into another basic block, with a call to splice instead.
I think it's NFC, however I'd like a second pair of eyes to look at it
just in case.

The reason for doing this is an edge case in the handling of DPValue
objects, the replacement for dbg.values. If there's a variable
assignment "dangling" at the end of a block (which happens when we
delete the terminator), inserting instructions at end() doesn't shift
the DPValue up into the block. We could probably fix this; but it's much
easier to use splice at the only call site that does this.

Patch adds --try-experimental-debuginfo-iterators to a test to exercise
this code path.
2024-01-23 16:23:48 +00:00
Stephen Tozer
632f44e5ed
[RemoveDIs][DebugInfo] Handle DPVAssign in most transforms (#78986)
This patch trivially updates various opt passes to handle DPVAssigns. In
all cases, this means some combination of generifying existing code to
handle DPValues and DbgAssignIntrinsics, iterating over DPValues where
previously we did not, or duplicating code for DbgAssignIntrinsics to
the equivalent DPValue function (in inlining and salvageDebugInfo).
2024-01-23 16:16:59 +00:00
Matt Arsenault
55f12299d8
ValueTracking: Recognize fcmp ole/ugt with inf as a class test (#79095)
These were missed and hopefully avoids assertions when
dc3faf0ed0e3f1ea9e435a006167d9649f865da1 is recommitted.
2024-01-23 20:20:40 +07:00
Florian Hahn
f47c4067fd
[PhaseOrder] Add test where indvars dropping NSW prevents vectorization.
End-to-end test for https://github.com/llvm/llvm-project/issues/71517,
testing IndVars/LoopVectorize interaction
2024-01-23 11:37:04 +00:00
Florian Hahn
1f9de23e94
[SCEVExp] Add additional tests for hoisting IVs with NSW flags. 2024-01-23 11:18:36 +00:00
AtariDreams
96adf69ba9
[InstCombine] Remove one-use check if other logic operand is constant (#77973)
By using `match(W, m_ImmConstant())`, we do not need to worry about
one-time use anymore.
2024-01-23 12:10:59 +01:00
Matt Arsenault
8076b89695 ValueTracking: Handle fcmp true/false in fcmpToClassTest
This ensures full compare coverage for certain special constants.
2024-01-23 12:10:45 +07:00
Matt Arsenault
1a99df9f3d ValueTracking: Add tests for fcmpToClassTest for fcmp ole/ugt inf
This catches an assertion in a recommit of
dc3faf0ed0e3f1ea9e435a006167d9649f865da1
2024-01-23 12:10:40 +07:00
Matt Arsenault
35ab0c78cf ValueTracking: Add tests fcmpToClassTest for fcmp true/false 2024-01-23 12:10:31 +07:00
wanglei
fcff4582f0
[LoongArch] Permit auto-vectorization using LSX/LASX with auto-vec feature (#78943)
With enough codegen complete, we can now correctly report the size of
vector registers for LSX/LASX, allowing auto vectorization (The
`auto-vec` feature needs to be enabled simultaneously).

As described, the `auto-vec` feature is an experimental one. To ensure
that automatic vectorization is not enabled by default, because the
information provided by the current `TTI` cannot yield additional
benefits for automatic vectorization.
2024-01-23 09:06:35 +08:00
Stephen Tozer
7c53e9f667
[RemoveDIs][DebugInfo] Add support for DPValues to LoopStrengthReduce (#78706)
This patch trivially extends support for DbgValueInst recovery to
DPValues in LoopStrengthReduce; they are handled identically, so this is
mostly done by reusing the DbgValueInst code (using templates or
auto-parameter lambdas to reduce actual code duplication).
2024-01-22 18:59:19 +00:00
Alexandros Lamprineas
530c72b498
[TLI] Add missing ArmPL mappings (#78474)
Adds TLI mappings for fixed and scalable vector variants of cospi(f),
fmax(f), ilogb(f) and ldexp(f).
2024-01-22 17:15:17 +00:00
Petr Maj
3c246efd04
True fixpoint algorithm in RS4GC (#75826)
Fixes a problem where the explicit marking of various instructions as
conflicts did not propagate to their users. An example of this:

```
%getelementptr = getelementptr i8, <2 x ptr addrspace(1)> zeroinitializer, <2 x i64> <i64 888, i64 908>
%shufflevector = shufflevector <2 x ptr addrspace(1)> %getelementptr, <2 x ptr addrspace(1)> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%shufflevector1 = shufflevector <2 x ptr addrspace(1)> %getelementptr, <2 x ptr addrspace(1)> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%select = select i1 false, <4 x ptr addrspace(1)> %shufflevector1, <4 x ptr addrspace(1)> %shufflevector
```

Here the vector shuffles will get single base (gep) during the fixpoint
and therefore the select will get a known base (gep). We later mark the
shuffles as conflicts, but this does not change the base of select. This
gets caught by an assert where the select's type will differ from its
(wrong) base later on.

The solution in the MR is to move the explicit conflict marking into the
fixpoint phase.

---------

Co-authored-by: Petr Maj <pmaj@azul.com>
2024-01-22 09:10:04 -05:00
Alexey Bataev
5a667bee9c [InstCombine] Try to fold trunc(shuffle(zext)) to just a shuffle (#78636)
Tries to remove extra trunc/ext instruction for shufflevector
instructions.

Differential Review: https://github.com/llvm/llvm-project/pull/78636
2024-01-22 05:50:20 -08:00
Pranav Kant
4482fd846a Revert "[InstCombine] Try to fold trunc(shuffle(zext)) to just a shuffle (#78636)"
This reverts commit 4d11f04b20f0bd7488e19e8f178ba028412fa519.

This breaks some programs as mentioned in #78636
2024-01-19 21:02:20 +00:00
Manish Kausik H
a0b9117454
LoopDeletion: Move EH pad check before the isLoopNeverExecuted Check (#78189)
This commit modifies `LoopDeletion::deleteLoopIfDead` to check if the
exit block of a loop is an EH pad before checking if the loop gets
executed. This handles the case where an unreachable loop has a
landingpad as an Exit block, and the loop gets deleted, leaving leaving
the landingpad without an edge from an unwind clause.

Fixes #76852.
2024-01-19 15:30:20 +01:00
Alexey Bataev
4d11f04b20
[InstCombine] Try to fold trunc(shuffle(zext)) to just a shuffle (#78636)
Tries to remove extra trunc/ext instruction for shufflevector
instructions.
2024-01-19 09:29:01 -05:00
Jay Foad
7017efa1a1 Fix typo "widended" 2024-01-19 13:50:26 +00:00
Graham Hunter
689da340ed [NFC][LV] Test precommit for interleaved linear args 2024-01-19 12:59:09 +00:00
Alexey Bataev
f9da4c6ead [SLP][NFC]Add a test with extending the types for vectorized
stores/insertelement instructions, NFC.
2024-01-18 16:42:45 -08:00
Nikita Popov
f20488687e [CVP] Add test with nested cycle (NFC)
This is a regression test for a miscompile that would have been
introduced by an upcoming patch.
2024-01-18 16:57:29 +01:00
Yingwei Zheng
9acc404230
[InstCombine] Recognize more rotation patterns (#78107)
InstCombine already handles the pattern `(shl ShVal, (X & (Width - 1)))
| (lshr ShVal, ((-X) & (Width - 1)))`. Under certain circumstances, `X &
(Width - 1)` will be simplified to `X`. Therefore, this patch adds
support for the pattern `(shl ShVal, X) | (lshr ShVal, ((-X) & (Width -
1)))`.

Alive2: https://alive2.llvm.org/ce/z/P7JQ2V
2024-01-18 20:29:53 +08:00
Congcong Cai
64e94438a4
[InstCombine] combine mul(abs(x),abs(y)) to abs(mul(x,y)) (#78395)
Fixes: https://github.com/llvm/llvm-project/issues/78076
Alive2 Proof: https://alive2.llvm.org/ce/z/XEDy0f
2024-01-18 20:12:00 +08:00
Nikita Popov
49e3e75143 [ConstantFold] Clean up binop identity folding
Resolve the two FIXMEs: Perform the binop identitiy fold with
AllowRHSConstant, and remove redundant folds later in the code.
2024-01-18 10:37:48 +01:00
paperchalice
bd9e14574a
[CodeGen] Port GlobalMerge to new pass manager (#77474) 2024-01-18 12:07:46 +07:00
alexfh
2d5cc1c9b3
Revert "[SimplifyCFG] switch: Do Not Transform the Default Case if the Condition is Too Wide" (#78469)
Reverts llvm/llvm-project#77831, which depends on #76669, which
seriously regresses compilation time / memory usage see
https://github.com/llvm/llvm-project/pull/76669#issuecomment-1889271710.
2024-01-17 19:04:34 +01:00
Bruno De Fraine
656bf13004
[AST] Don't merge memory locations in AliasSetTracker (#65731)
This changes the AliasSetTracker to track memory locations instead of
pointers in its alias sets. The motivation for this is outlined in an RFC
posted on LLVM discourse:
https://discourse.llvm.org/t/rfc-dont-merge-memory-locations-in-aliassettracker/73336

In the data structures of the AST implementation, I made the choice to
replace the linked list of `PointerRec` entries (that had to go anyway)
with a simple flat vector of `MemoryLocation` objects, but for the
`AliasSet` objects referenced from a lookup table, I retained the
mechanism of a linked list, reference counting, forwarding, etc. The
data structures could be revised in a follow-up change.
2024-01-17 15:59:13 +01:00
David Sherwood
fca6992be1
[AArch64] Fix a minor issue with AArch64LoopIdiomTransform (#78136)
I found another case where in the end block we could have a PHI that we
deal with incorrectly. The two incoming values are unique - one of them
is
the induction variable and another one is a value defined outside the
loop, e.g.

  %final_val = phi i32 [ %inc, %while.body ], [ %d, %while.cond ]

We won't correctly select between the two values in the new end block
that
we create and so we will get the wrong result.
2024-01-17 14:30:06 +00:00
Valery Pykhtin
9791e54149
Revert "[AMDGPU] Add InstCombine rule for ballot.i64 intrinsic in wave32 mode." (#78429)
Reverts llvm/llvm-project#71556

Fixes failures:
https://lab.llvm.org/buildbot/#/builders/188/builds/40541
https://lab.llvm.org/buildbot/#/builders/91/builds/21847
https://lab.llvm.org/buildbot/#/builders/98/builds/31671
https://lab.llvm.org/buildbot/#/builders/139/builds/57289
2024-01-17 14:12:07 +01:00
Valery Pykhtin
57b50ef017
[AMDGPU] Add InstCombine rule for ballot.i64 intrinsic in wave32 mode. (#71556)
Substitute with zero-extended to i64 ballot.i32 intrinsic.
2024-01-17 17:02:05 +07:00
Alexandros Lamprineas
92289db82f
[VFABI] Move the Vector ABI demangling utility to LLVMCore. (#77513)
This fixes #71892 allowing us to check magled names in the IR verifier.
2024-01-17 09:55:30 +00:00