19 Commits

Author SHA1 Message Date
Mircea Trofin
5a50ab4d5c [nfc][mlgo][regalloc] Stop warnings about unused function
Added a `NoopSavedModelImpl` type which can be used as a mock AOT-ed
saved model, and further minimize conditional compilation cases. This
also removes unused function warnings on gcc.
2022-02-08 08:35:33 -08:00
Mircea Trofin
91a33ad32b [nfc][mlgo][regalloc] Cache live interval feature components
Lazily cache the feature components of a LiveInterval.

Differential Revision: https://reviews.llvm.org/D118674
2022-02-03 17:01:42 -08:00
Mircea Trofin
592f52de33 [nfc][regalloc] const LiveIntervals within the allocator
Once built, LiveIntervals are immutable. This patch captures that.

Differential Revision: https://reviews.llvm.org/D118918
2022-02-03 12:35:36 -08:00
Mircea Trofin
79b98f0a07 Revert "[nfc][mlgo] De-const a parameter"
This reverts commit bc3b372161716a4c4845d47a877e4892df0d08da.

The planned change that would have needed non-const MachineFunction refs
isn't needed after all.
2022-02-03 09:20:36 -08:00
Mircea Trofin
660ff655c8 Fix buildbreak introduced in ed2deab5956fea9e8f64ef6020fe0b4e19734ecc 2022-02-02 07:34:51 -08:00
Mircea Trofin
ed2deab595 [nfc][regalloc] Make the max inference cutoff configurable
Added a flag to make configurable the number of interferences after
which we 'bail out' and treat a set of intervals as un-evictable. Also
using it on the ML side, as it turns out to be a good control for
compile-time.

With this configurable, we can do a bit of trial and error and see if
bumping it has any effect on heuristic/policy quality.

Differential Revision: https://reviews.llvm.org/D118707
2022-02-02 07:29:34 -08:00
Mircea Trofin
a3f1491849 [nfc][mlgo][regalloc] 'hasPreferredPhys' out of feature components
It isn't cacheable, it can be updated by other events than live interval
resizing.
2022-01-31 18:59:47 -08:00
Mircea Trofin
9aa2c914b9 [mlgo][regalloc] Factor live interval feature calculation
Factoring it out so we can subsequently cache it. This should be a NFC,
however, for the float quantities, we see small errors in the least
significant digits. This is because, before, we were summing up one by
one. Now, we sum up results of sums.

This shouldn't matter for ML, and will require rework when we do
quantization (avoiding floats altogether), but meanwhile, it did require
an update to the reference file used for testing.

The patch also bumps the precision of the variables involved in this, to
reduce the error (note they are casted back to float at the end by the
SET macro, since we only work with float and not double in TF)

Differential Revision: https://reviews.llvm.org/D118659
2022-01-31 15:19:15 -08:00
Mircea Trofin
bc3b372161 [nfc][mlgo] De-const a parameter
We plan to pass the MachineFunction& to APIs that expect it non-const
(for legitimate reasons). The advisor still holds the ref as a const
ref, though, so we keep most of the maintainability value of that.
2022-01-31 13:44:33 -08:00
Fangrui Song
0e691aed7e [mlgo][regalloc] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after a8a7bf922cea8af01168f7a4adf4ed0365bcc2b4 2022-01-30 15:18:30 -08:00
Mircea Trofin
a8a7bf922c [mlgo][regalloc] Fix register masking
If AllocationOrder has less than 32 elements, we were treating the extra
positions as if they were valid. This was detected by a subsequent
assert. The fix also tightens the asserts.
2022-01-30 14:59:08 -08:00
Mircea Trofin
b1af01fe6a [NFC][MLGO] Simplify conditional compilation
Most of the code that's shared between 'release' and 'development'
modes doesn't depend on anything special.
2022-01-24 11:19:04 -08:00
Mircea Trofin
f29256a64a [MLGO] Improved support for AOT cross-targeting scenarios
The tensorflow AOT compiler can cross-target, but it can't run on (for
example) arm64. We added earlier support where the AOT-ed header and object
would be built on a separate builder and then passed at build time to
a build host where the AOT compiler can't run, but clang can be otherwise
built.

To simplify such scenarios given we now support more than one AOT-able
case (regalloc and inliner), we make the AOT scenario centered on whether
files are generated, case by case (this includes the "passed from a
different builder" scenario).
This means we shouldn't need an 'umbrella' LLVM_HAVE_TF_AOT, in favor of
case by case control. A builder can opt out of an AOT case by passing that case's
model path as `none`. Note that the overrides still take precedence.

This patch controls conditional compilation with case-specific flags,
which can be enabled locally, for the component where those are
available. We still keep an overall flag for some tests.

The 'development/training' mode is unchanged, because there the model is
passed from the command line and interpreted.

Differential Revision: https://reviews.llvm.org/D117752
2022-01-20 07:05:39 -08:00
Mircea Trofin
073e09683d Fix build break introduced by D117147 2022-01-19 11:43:51 -08:00
Mircea Trofin
e67430cca4 [MLGO] ML Regalloc Eviction Advisor
The bulk of the implementation is common between 'release' mode (==AOT-ed
model) and 'development' mode (for training), the main difference is
that in development mode, we may also log features (for training logs),
inject scoring information (currently after the Virtual Register
Rewriter) and then produce the log file.

This patch also introduces the score injection pass, 'Register
Allocation Pass Scoring', which is trivially just logging the score in
development mode.

Differential Revision: https://reviews.llvm.org/D117147
2022-01-19 11:00:32 -08:00
Mircea Trofin
b2d2e93138 [NFC][MLGO] The regalloc reward is float, not int64_t 2022-01-12 09:32:41 -08:00
Mircea Trofin
3150bce078 [NFC][MLGO] Prep a few files before the main ML Regalloc adviser
To avoid trivial changes.
2022-01-12 08:54:00 -08:00
Kazu Hirata
410480e32b Ensure newlines at the end of files (NFC) 2022-01-06 23:44:02 -08:00
Mircea Trofin
68ac7b1701 [NFC][mlgo] Add feature declarations for the ML regalloc advisor
This just adds feature declarations and some boilerplate.

Differential Revision: https://reviews.llvm.org/D116076
2022-01-05 11:54:01 -08:00