4 Commits

Author	SHA1	Message	Date
Rahul Joshi	7c6592f5a3	[TableGen] Change CodeGenRegister to use const Record pointer (#108027) ... Change CodeGenRegister to use const Record pointer. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089	2024-09-11 08:53:47 -07:00
Rahul Joshi	985600dcd3	[TableGen] Migrate CodeGenHWModes to use const RecordKeeper (#107851) ... Migrate CodeGenHWModes to use const RecordKeeper and const Record pointers. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089	2024-09-09 13:09:53 -07:00
Craig Topper	baf66ec061	[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368) ... This is needed to provide proper size and offset for the GPRPair subreg indices on RISC-V. The size of a GPR already uses HwMode. Previously we said the subreg indices have unknown size and offset, but this stops DwarfExpression::addMachineReg from being able to find the registers that make up the pair. I believe this fixes https://github.com/llvm/llvm-project/issues/85864 but need to verify.	2024-03-27 12:19:28 -07:00
Pierre van Houtryve	fa3d789df1	[RFC][TableGen] Restructure TableGen Source (#80847) ... Refactor of the llvm-tblgen source into: - a "Basic" library, which contains the bare minimum utilities to build `llvm-min-tablegen` - a "Common" library which contains all of the helpers for TableGen backends. Such helpers can be shared by more than one backend, and even unit tested (e.g. CodeExpander is, maybe we can add more over time) Fixes #80647	2024-03-25 09:40:35 +01:00