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3 Commits

Author SHA1 Message Date
Stanislav Mekhanoshin
c43784ff26 [AMDGPU] Increase kernel padding 
To support prefetch mode 3 we need to pad current
cacheline and fill 3 cachelines after. Current padding
is only sufficient for mode 2.

Differential Revision: https://reviews.llvm.org/D65236

llvm-svn: 366938
 2019-07-24 19:40:13 +00:00
Nicolai Haehnle
ae4fcb97dd AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer 
Summary:
The purpose of the padding is to guard against stale code being
fetched into the instruction cache by the lowest level prefetching.
We're generating relocatable ELF here, and so the padding should
arguably be added by the linker. This is in fact what Mesa does.

This also fixes multi-part shaders for Mesa.

Change-Id: I6bfede58f20e9f337762ccf39ef9e0e263e69e82

Reviewers: arsenm, rampitec, t-tye

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63427

llvm-svn: 363602
 2019-06-17 19:28:43 +00:00
Stanislav Mekhanoshin
41bbe101a2 [AMDGPU] gfx1010 s_code_end generation 
Also add some missing metadata in the streamer.

Differential Revision: https://reviews.llvm.org/D61531

llvm-svn: 359937
 2019-05-03 21:26:39 +00:00