shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
536,077 Commits 1,713 Branches 298 Tags
Commit Graph

2 Commits

Author SHA1 Message Date
YunQiang Su
e9a34e4236
[RISCV] Support vectorizing FMINIMUMNUM and FMAXIMUMNUM (#135727) 
RISC-V V extension support vfmax and vfmin, which follow IEEE754-2019.
We can use them directly.
 2025-04-27 19:10:02 +08:00
YunQiang Su
e25187bc3e
LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (#133843) 
Vectorizing of fminimumnum and fminimumnum have not support yet. Let's
add the testcase for it now, and we will update the testcase when we
support it.
 2025-04-02 08:46:02 +08:00