4110 Commits

Author SHA1 Message Date
Nicolas Vasilache
aef0877b1b [mlir][Linalg] NFC - Rename Linalg and Vector EDSCs to avoid collisions
A certain number of EDSCs have a named form (e.g. `linalg.matmul`) and a generic form (e.g. `linalg.generic` with matmul traits).
Despite living in different namespaces, using the same name is confusiong in clients.
Rename them as `linalg_matmul` and `linalg_generic_matmul` respectively.
2020-04-02 21:09:49 -04:00
Mehdi Amini
ee4d034277 Change pass registration generated code to allow users to selectively register passes
This slightly tweaks the generated code from:

  #ifdef GEN_PASS_REGISTRATION
  ::mlir::registerPass("flag1", ...
  ::mlir::registerPass("flag2", ...
  #endif // GEN_PASS_REGISTRATION

to:

  #ifdef GEN_PASS_REGISTRATION
  #define GEN_PASS_REGISTRATION_Pass1
  #define GEN_PASS_REGISTRATION_Pass2
  #endif // GEN_PASS_REGISTRATION

  #ifdef GEN_PASS_REGISTRATION_Pass1
  ::mlir::registerPass("flag1", ...
  #endif
  #ifdef GEN_PASS_REGISTRATION_Pass1
  ::mlir::registerPass("flag2", ...
  #endif

That way the generated code can be included by defining the
`GEN_PASS_REGISTRATION` macro as currenty and register all the passes,
but one can also define only `GEN_PASS_REGISTRATION_Pass1` to register a
subset of the passes.

Differential Revision: https://reviews.llvm.org/D77322
2020-04-02 18:58:47 +00:00
Nicolas Vasilache
add9f1a5dc [mlir][LLVM] Finer-grained control for C interface emission
C interface emission is controlled by a flag and has coarse granularity.
With this coarse control, interfaces are emitted for all external functions.
This makes is easy to get undefined symbols.

This revision adds support for controlling per-function emission with an "emit_c_interface" attribute.
2020-04-02 13:07:10 -04:00
Alex Zinenko
802bb8b5c2 [mlir] StandardToLLVM conversion: remove dead code
This code is unused since 04ed07bc174149d61c8a4ed131f0838578bdcaa5,
but it was not removed in that commit.
2020-04-02 18:52:40 +02:00
Alex Zinenko
0a2131b7e2 [mlir] LLVMFuncOp: provide a capability to pass attributes through to LLVM IR
Summary:
LLVM IR functions can have arbitrary attributes attached to them, some of which
affect may affect code transformations. Until we can model all attributes
consistently, provide a pass-through mechanism that forwards attributes from
the LLVMFuncOp in MLIR to LLVM IR functions during translation. This mechanism
relies on LLVM IR being able to recognize string representations of the
attributes and performs some additional checking to avoid hitting assertions
within LLVM code.

Differential Revision: https://reviews.llvm.org/D77072
2020-04-02 12:52:46 +02:00
Uday Bondhugula
7c771631c6 [MLIR][NFC] drop unnecessary matches in affine dma generate test case
Drop unnecessary matches in affine DMA generate test case.

Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77243
2020-04-02 03:02:07 +05:30
Uday Bondhugula
5e8093134a [MLIR] Add method to drop duplicate result exprs from AffineMap
Add a method that given an affine map returns another with just its unique
results. Use this to drop redundant bounds in max/min for affine.for. Update
affine.for's canonicalization pattern and createCanonicalizedForOp to use
this.

Differential Revision: https://reviews.llvm.org/D77237
2020-04-02 03:00:19 +05:30
River Riddle
8bf1583b71 [mlir] Move LLVMPassIncGen to LLVMIR/Transforms/CMakeLists.txt
This fixes a build error with the make generator for a missing
sub-directory.
2020-04-01 14:10:05 -07:00
Nicolas Vasilache
c4c20376f7 [mlir][Linalg][Doc] Minor doc fixes 2020-04-01 13:41:45 -04:00
Mehdi Amini
b8c260c38d Remove linking all targets from mlir-opt (NFC)
There is no need to directly depends on this from mlir-opt, some library
may transitively depend on a subset of the targets when enabled (like
NVPTX for Cuda codegen tests) but this is handled by CMake already.
2020-04-01 17:21:07 +00:00
Mehdi Amini
0dd21130ef Add LLVM_ATTRIBUTE_UNUSED to function used only in assert (NFC) 2020-04-01 17:21:07 +00:00
Uday Bondhugula
572890f1d3 [MLIR][NFC] clean up affine data copy test case
Capture maps to test better; drop unnecessary matches

Differential Revision: https://reviews.llvm.org/D77196
2020-04-01 22:37:49 +05:30
Uday Bondhugula
68316afb29 [MLIR][NFC] loop transforms/analyis utils cleanup / modernize
Modernize/cleanup code in loop transforms utils - a lot of this code was
written prior to the currently available IR support / code style. This
patch also does some variable renames including inst -> op, comment
updates, turns getCleanupLoopLowerBound into a local function.

Differential Revision: https://reviews.llvm.org/D77175
2020-04-01 22:36:25 +05:30
MaheshRavishankar
9b31e595d7 [mlir] Modify GPU to SPIR-V conversion to respect
spv.interface_var_abi attributes if it exists already.

Differential Revision: https://reviews.llvm.org/D77195
2020-04-01 09:34:49 -07:00
Tres Popp
a67cd71acd [MLIR] Implement LoopLikeInterface for loop.parallel
Summary:
This is to allow optimizations like loop invariant code motion to work
on the ParallelOp.

Additional small cleanup on the ForOp implementation of
LoopLikeInterface and the test file of loop-invariant-code-motion.

Differential Revision: https://reviews.llvm.org/D77128
2020-04-01 16:47:57 +02:00
River Riddle
9be4be3e53 [mlir][Pass] Add support for generating pass documention from the tablegen definition
Summary:
This revision adds support for auto-generating pass documentation, replacing the need to manually keep Passes.md up-to-date. This matches the behavior already in place for dialect and interface documentation.

Differential Revision: https://reviews.llvm.org/D76660
2020-04-01 02:10:46 -07:00
River Riddle
9a277af2d4 [mlir][Pass] Add support for generating pass utilities via tablegen
This revision adds support for generating utilities for passes such as options/statistics/etc. that can be inferred from the tablegen definition. This removes additional boilerplate from the pass, and also makes it easier to remove the reliance on the pass registry to provide certain things(e.g. the pass argument).

Differential Revision: https://reviews.llvm.org/D76659
2020-04-01 02:10:46 -07:00
River Riddle
3dddd8969f [mlir][Pass] Move the registration of conversion passes to tablegen
This removes the need to statically register conversion passes, and also puts all of the conversions within one centralized file.

Differential Revision: https://reviews.llvm.org/D76658
2020-04-01 02:10:46 -07:00
River Riddle
e3d834a54a [mlir][Pass] Move the registration of dialect passes to tablegen
This generates a Passes.td for all of the dialects that have transformation passes. This removes the need for global registration for all of the dialect passes.

Differential Revision: https://reviews.llvm.org/D76657
2020-04-01 02:10:46 -07:00
River Riddle
8155e41ac6 [mlir][Pass] Add a tablegen backend for defining Pass information
This will greatly simplify a number of things related to passes:
* Enables generation of pass registration
* Enables generation of boiler plate pass utilities
* Enables generation of pass documentation

This revision focuses on adding the basic structure and adds support for generating the registration for passes in the Transforms/ directory. Future revisions will add more support and move more passes over.

Differential Revision: https://reviews.llvm.org/D76656
2020-04-01 02:10:46 -07:00
Ulysse Beaugnon
49af380942 Add a method to build affine maps with zero or more results.
Summary:
The commit provides a single method to build affine maps with zero or more
results. Users of mlir::AffineMap previously had to dispatch between two methods
depending on the number of results.

At the same time, this commit fixes the method for building affine map with zero
results that was previously ignoring its `symbolCount` argument.

Differential Revision: https://reviews.llvm.org/D77126
2020-04-01 10:47:18 +02:00
Tres Popp
90b7bbffdd [MLIR] Rename collapsePLoops -> collapseParallelLoops
Summary:
Additionally, NFC code cleanups were done.

This is to address additional comments on
https://reviews.llvm.org/D76363

Differential Revision: https://reviews.llvm.org/D77052
2020-04-01 10:15:13 +02:00
Tres Popp
61bab7c31a [MLIR] Replace OpBuilder(Block) with atBlockBegin and atBlockEnd
Summary:
OpBuilder(Block) is specifically replaced with
OpBuilder::atBlockEnd(Block);

This is to make insertion behavior clear due to there being no one
correct answer for which location in a block the default insertion
point should be.

Differential Revision: https://reviews.llvm.org/D77060
2020-04-01 10:06:41 +02:00
Hanhan Wang
6dd696ae4f [mlir][Linalg] Extend fusion to support WAW atm on buffers.
Summary:
The RAW fusion happens only if the produecer block dominates the consumer block.
The WAW pattern also works with the precondition. I.e., if a producer can
dominate the consumer, they can fairly fuse together.

Since they are all tilable, we can think the pattern like this way:

Input:
```
linalg_op1 view

tile_loop
  subview_2
  linalg_op2 subview_2
```

Tile the first Linalg op as same as the second Linalg.
```
tile_loop
  subview_1
  linalg_op1 subview_1

tile_loop
  subview_2
  liangl_op2 subview_2
```

Since the first Linalg op is tilable in the same way and the computation are
independently, it's fair to fuse it with the second Linalg op.
```
tile_loop
  subview_1
  linalg_op1 subview_1
  linalg_op2 subview_2
```

In short, this patch includes:
- Handling both RAW and WAW pattern.
- Adding a interface method to get input and output buffers.
- Exposing a method to get a StringRef of a dependency type.
- Fixing existing WAW tests and add one more use case: initialize the buffer
  before conv op.

Differential Revision: https://reviews.llvm.org/D76897
2020-03-31 21:33:50 -07:00
Hanhan Wang
69ddee1d2a [mlir][Linalg] Introduce linalg.pooling_min/max/sum op.
Summary:
Performs an N-D pooling operation similarly to the description in the TF
documentation:
https://www.tensorflow.org/api_docs/python/tf/nn/pool

Different from the description, this operation doesn't perform on batch and
channel. It only takes tensors of rank `N`.

```
  output[x[0], ..., x[N-1]] =
    REDUCE_{z[0], ..., z[N-1]}
      input[
            x[0] * strides[0] - pad_before[0] + dilation_rate[0]*z[0],
            ...
            x[N-1]*strides[N-1] - pad_before[N-1] + dilation_rate[N-1]*z[N-1]
            ],
```

The required optional arguments are:
  - strides: an i64 array specifying the stride (i.e. step) for window
    loops.
  - dilations: an i64 array specifying the filter upsampling/input
    downsampling rate
  - padding: an i64 array of pairs (low, high) specifying the number of
    elements to pad along a dimension.

If strides or dilations attributes are missing then the default value is
one for each of the input dimensions. Similarly, padding values are zero
for both low and high in each of the dimensions, if not specified.

Differential Revision: https://reviews.llvm.org/D76414
2020-03-31 21:21:54 -07:00
Alex Grosul
855e738be2 [VectorOps] Implement a simple folder for identity vector.transpose operations.
Differential Revision: https://reviews.llvm.org/D77088
2020-03-31 17:03:10 -07:00
Lei Zhang
ee77607ca6 [mlir][spirv] Include SPIR-V op definitions in main SPIR-V doc
Differential Revision: https://reviews.llvm.org/D77174
2020-03-31 18:29:17 -04:00
Uday Bondhugula
e1fb9d5372 [MLIR][NFC] modernize affine.for unroll test pass
The walk code here was written before any of the support was
available in IR/. Replace/cleanup.

Differential Revision: https://reviews.llvm.org/D77166
2020-04-01 02:22:28 +05:30
Lei Zhang
d26435c170 [mlir][spirv] Change op doc description autogen separator
This commit changes the separator line for dividing auto-generated
docs from spec and manually added appendix from "### Custom assembly
form" to "<!-- End of AutoGen section -->". This is in preparation
to use the declarative assembly form in MLIR core. We will replace
more and more manually written assembly forms to be autogenerated.

Differential Revision: https://reviews.llvm.org/D77158
2020-03-31 15:28:06 -04:00
Uday Bondhugula
5f9bf3f656 [MLIR][NFC] Move test/Transforms/lower-affine.mlir -> test/Conversion
Move lower-affine.mlir from test/Transforms to
test/Conversion/AffineToStandard/. Other related NFC.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77008
2020-03-31 23:34:50 +05:30
Uday Bondhugula
7fca0e9797 [MLIR] Add simple runner utilities for timing
Add utilities print_flops, rtclock for timing / benchmarking. Add
mlir_runner_utils_dir test conf variable.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76912
2020-03-31 23:08:29 +05:30
MaheshRavishankar
da7b6fe942 [mlir][Linalg] Allow tiling of batch dimension for convolution ops with padding.
Existing tiling implementation of Linalg would still work for tiling
the batch dimensions of the convolution op.

Differential Revision: https://reviews.llvm.org/D76637
2020-03-31 09:22:38 -07:00
Andy Davis
31a346cc35 [MLIR][Vector] Add support for TupleGetOp folding through InsertSlicesOp and ExtractSlicesOp.
Summary:
Add support for TupleGetOp folding through InsertSlicesOp and ExtractSlicesOp.
Vector-to-vector transformations for unrolling and lowering to hardware vectors
can generate chains of structured vector operations (InsertSlicesOp,
ExtractSlicesOp and ShapeCastOp) between the producer of a hardware vector
value and its consumer. Because InsertSlicesOp, ExtractSlicesOp and ShapeCastOp
are structured, we can track the location (tuple index and vector offsets) of
the consumer vector value through the chain of structured operations to the
producer, enabling a much more powerful producer-consumer fowarding of values
through structured ops and tuple, which in turn enables a more powerful
TupleGetOp folding transformation.

Reviewers: nicolasvasilache, aartbik

Reviewed By: aartbik

Subscribers: grosul1, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76889
2020-03-31 08:39:17 -07:00
Ahmed Taei
221fa96cd4 Fix linalg.generic access of hoisted constants
Summary: Otherwise the added @generic_const_int will fail

Reviewers: nicolasvasilache, rriddle, mravishankar

Subscribers: mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, grosul1, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77109
2020-03-30 21:15:41 -07:00
Mehdi Amini
111c932855 Fix test: add -allow-unregistered-dialect to Affine/loop-permute.mlir test (missed during rebase) 2020-03-30 20:14:47 +00:00
Mehdi Amini
bab5bcf8fd Add a flag on the context to protect against creation of operations in unregistered dialects
Differential Revision: https://reviews.llvm.org/D76903
2020-03-30 19:37:31 +00:00
River Riddle
01c857bc83 [mlir] Update all dialects docs to use 'dialect-namespace' in the header 2020-03-30 12:25:15 -07:00
Stella Laurenzo
0af6d27e2e Add /bigobj for SPIRV dialect on MSVC.
Summary: This object file has grown beyond the default limit, and elsewhere in LLVM, we seem to be setting this flag as a one-off, so continuing that here.

Reviewers: mravishankar, antiagainst

Subscribers: mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, bader, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77002
2020-03-30 12:00:00 -07:00
Uday Bondhugula
f273e5c507 [MLIR] Fix permuteLoops utility
Rewrite mlir::permuteLoops (affine loop permutation utility) to fix
incorrect approach. Avoiding using sinkLoops entirely - use single move
approach. Add test pass.

This fixes https://bugs.llvm.org/show_bug.cgi?id=45328

Depends on D77003.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77004
2020-03-30 23:38:23 +05:30
scentini
3b20970de8 Fix unused-variable error when assertions are disabled 2020-03-30 13:55:43 +02:00
Hanhan Wang
65c7031370 [mlir] Fix typos in DeclarativeRewrites.md
Differential Revision: https://reviews.llvm.org/D77040
2020-03-30 01:20:41 -07:00
River Riddle
16f27b70a5 [mlir][NFC] Update dialect/op documentation to be consistent
Summary:
This revision performs a lot of different cleanups on operation documentation to ensure that they are consistent, e.g. using mlir code blocks, formatting, etc.

This revision also includes the auto-generated documentation into the hand-written documentation for the dialects that have a specific top-level dialect file. This updates the documentation for all dialects aside from SPIRV and STD. These dialects will be updated in a followup.

Differential Revision: https://reviews.llvm.org/D76734
2020-03-29 22:02:23 -07:00
River Riddle
f86104bb68 [mlir][NFC] Use the auto-generated op documentation in the standard dialect documentation
Summary: This revision updates the dialect documentation to use the auto-generated markdown for operations. This allows for updating some out-of-date bits of documentation, and allows for displaying a large of number of newly added operations that did not have a counter part in Standard.md.

Differential Revision: https://reviews.llvm.org/D76743
2020-03-29 21:53:40 -07:00
River Riddle
3d44f48edc [mlir][Diagnostics] Don't print note source line if it is the same as the previous diagnostic
Summary: This revision updates the SourceMgrDiagnosticHandler to not print the source location of a note if it is the same location as the previously printed diagnostic. This helps avoid redundancy, and potential confusion, when looking at the diagnostic output.

Differential Revision: https://reviews.llvm.org/D76787
2020-03-29 21:43:44 -07:00
Uday Bondhugula
4e4ea2cde4 [MLIR] Add missing asserts in interchangeLoops util, doc comment update
Add missing assert checks for input to mlir::interchangeLoops utility.
Rename interchangeLoops -> permuteLoops; update doc comments to clarify
inputs / return val. Other than the assert checks, this is NFC.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D77003
2020-03-30 00:03:12 +05:30
Kazuaki Ishizaki
b632bd88a6 [mlir] NFC: fix trivial typo in documents
Reviewers: mravishankar, antiagainst, nicolasvasilache, herhut, aartbik, mehdi_amini, bondhugula

Reviewed By: mehdi_amini, bondhugula

Subscribers: bondhugula, jdoerfert, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, bader, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76993
2020-03-30 00:34:23 +09:00
Aaron Smith
6dab806712 [mlir] Add exp2 conversion to llvm.intr.exp2 2020-03-29 01:23:08 -07:00
Mehdi Amini
9dd92a5697 Remove spurious duplicated header include (NFC) 2020-03-28 03:49:53 +00:00
Sean Silva
6677477190 Verify number of result types in generated builder.
Summary: This just bit me and is nasty to debug.

Differential Revision: https://reviews.llvm.org/D76888
2020-03-27 20:05:42 -07:00
Uday Bondhugula
fec6c5ac5e [MLIR][NFC] Move TestDialect -> Dialect/Test
Move test/lib/TestDialect to test/lib/Dialect/Test - makes the dir
structure more uniform.

Signed-off-by: Uday Bondhugula <uday@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D76677
2020-03-28 07:12:55 +05:30