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20 Commits

Author SHA1 Message Date
NAKAMURA Takumi
6091e1aed5 ARM64AsmParser.cpp: Fix vg_leak in MC/ARM64/fp-encoding.s. 
llvm-svn: 206279
 2014-04-15 13:22:11 +00:00
Stepan Dyatkovskiy
95cdac43af Optional hash symbol feature support for ARM64 
http://reviews.llvm.org/D3328

llvm-svn: 206276
 2014-04-15 11:43:09 +00:00
Bradley Smith
779238a216 [ARM64] Fix canonicalisation of MOVs. MOV is too complex to be modelled by a dumb alias. 
llvm-svn: 205889
 2014-04-09 14:44:18 +00:00
Bradley Smith
f823079acd [ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all labels types 
llvm-svn: 205888
 2014-04-09 14:44:12 +00:00
Bradley Smith
3971d3dc75 [ARM64] Rename LR to the UAL-compliant 'X30'. 
llvm-svn: 205885
 2014-04-09 14:43:59 +00:00
Bradley Smith
6f1aa59c31 [ARM64] Rename FP to the UAL-compliant 'X29'. 
llvm-svn: 205884
 2014-04-09 14:43:50 +00:00
Bradley Smith
9f29b726d5 [ARM64] Add missing tlbi operands and error for extra/missing register on tlbi aliases. 
llvm-svn: 205876
 2014-04-09 14:43:11 +00:00
Bradley Smith
e8b4166acc [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants. 
llvm-svn: 205875
 2014-04-09 14:43:06 +00:00
Bradley Smith
3339427e2a [ARM64] Remove PrefetchOp and use ARM64PRFM instead. 
llvm-svn: 205872
 2014-04-09 14:42:53 +00:00
Bradley Smith
16478c4ccf [ARM64] Add WZR to isGPR32Register, since every use needs to check for this anyway. 
llvm-svn: 205871
 2014-04-09 14:42:49 +00:00
Bradley Smith
fb90df563f [ARM64] Move CPSRField and DBarrier operands over to AArch64-style disassembly and assembly. This removes the last users of namespace ARM64SYS. 
llvm-svn: 205869
 2014-04-09 14:42:42 +00:00
Bradley Smith
08c391c156 [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to using AArch64-style system registers, and fix up test failures discovered in the process. 
llvm-svn: 205868
 2014-04-09 14:42:36 +00:00
Bradley Smith
2ba17a4a17 [ARM64] Move ARM64BaseInfo.{cpp,h} into a Utils/ subdirectory, a la AArch64. These files are required in the decoder, disassembler and parser, and a layering violation was imminent. 
llvm-svn: 205867
 2014-04-09 14:42:27 +00:00
Bradley Smith
527bf86e56 [ARM64] Add support for NV condition code (exists only for valid assembly/disassembly, equivilant to AL) 
llvm-svn: 205864
 2014-04-09 14:42:07 +00:00
Bradley Smith
7d253f29a4 [ARM64] Add parsing for vector lists such as {v0.8b-v3.8b} 
llvm-svn: 205862
 2014-04-09 14:41:58 +00:00
Bradley Smith
664aa67153 [ARM64] Correctly alias LSL to UXTW for 32bit instruction variants, rather than UXTX 
llvm-svn: 205861
 2014-04-09 14:41:53 +00:00
Aaron Ballman
d1726ee8fa Fixing warnings in the MSVC build. No functional changes intended. 
llvm-svn: 205301
 2014-04-01 12:22:20 +00:00
Chandler Carruth
81f7061065 [ARM64] Fix a heap-use-after-free spotted by ASan. 
StringRef::lower() returns a std::string. Better yet, we can now stop
thinking about what it returns and write 'auto'. It does the right
thing. =]

llvm-svn: 205135
 2014-03-30 09:08:07 +00:00
Dmitri Gribenko
1fd72104ad Fix a few -Wdocumentation warnings 
llvm-svn: 205116
 2014-03-29 19:40:32 +00:00
Tim Northover
00ed9964c6 ARM64: initial backend import 
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
 2014-03-29 10:18:08 +00:00