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4 Commits

Author SHA1 Message Date
Tim Northover
18f68f6d1a ARM64: use 32-bit moves for constants where possible. 
If we know that a particular 64-bit constant has all high bits zero, then we
can rely on the fact that 32-bit ARM64 instructions automatically zero out the
high bits of an x-register. This gives the expansion logic less constraints to
satisfy and so sometimes allows it to pick better sequences.

Came up while porting test/CodeGen/AArch64/movw-consts.ll: this will allow a
32-bit MOVN to be used in @test8 soon.

llvm-svn: 206379
 2014-04-16 11:52:51 +00:00
Quentin Colombet
72dad56c53 [ARM64] Set default CPU to generic instead of cyclone. 
llvm-svn: 206313
 2014-04-15 19:08:46 +00:00
Bradley Smith
6f1aa59c31 [ARM64] Rename FP to the UAL-compliant 'X29'. 
llvm-svn: 205884
 2014-04-09 14:43:50 +00:00
Tim Northover
00ed9964c6 ARM64: initial backend import 
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
 2014-03-29 10:18:08 +00:00