255 Commits

Author SHA1 Message Date
Jay Foad
d449d3dc13
[CodeGen] Remove FinalizeMachineBundles pass (#149806)
Replace its only use in the AMDGPU R600 backend with a call to
finalizeBundles.
2025-07-23 11:36:49 +01:00
Vikram Hegde
4aa85cc313
[CodeGen][NPM] Port ProcessImplicitDefs to NPM (#148110)
same as https://github.com/llvm/llvm-project/pull/138829

Co-authored-by : Oke, Akshat
<[Akshat.Oke@amd.com](mailto:Akshat.Oke@amd.com)>
2025-07-16 13:23:27 +05:30
Vikram Hegde
fcd4a2fe7a
[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690) 2025-07-10 13:10:46 +05:30
Akshat Oke
b33d95fb8a
[CodeGen][NPM] Port InitUndef to NPM (#138495) 2025-07-09 15:31:31 +05:30
Akshat Oke
e91cbd4f29
[CodeGen][NPM] Port VirtRegRewriter to NPM (#130564) 2025-04-30 14:10:46 +05:30
Vikram Hegde
53a8b89003
[CodeGen][NewPM] Port "ShrinkWrap" pass to NPM (#129880) 2025-04-30 13:11:17 +05:30
Vikram Hegde
86d8e8d9a6
[CodeGen][NewPM] Port "PrologEpilogInserter" to NPM (#130550) 2025-04-29 13:13:45 +05:30
Akshat Oke
31ddaef8d1
[CodeGen][NPM] Port UnreachableMachineBlockElim to NPM (#136127) 2025-04-18 15:06:30 +05:30
Akshat Oke
a09fd9c653
[CodeGen][NPM] Port MachineBlockPlacementStats to NPM (#129853) 2025-04-17 15:24:46 +05:30
Akshat Oke
a388395b86
[CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (#130070) 2025-04-15 12:37:19 +05:30
Akshat Oke
f133eae70c
[CodeGen][NPM] Port MachineSanitizerBinaryMetadata to NPM (#130069)
Didn't find a test for this (but there are tests for the `Function`
version of this pass)
2025-04-14 20:52:26 +05:30
Akshat Oke
e29f986838
[CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (#130068) 2025-04-14 12:58:03 +05:30
Akshat Oke
b283ff7eb1
[CodeGen][NPM] Port BranchRelaxation to NPM (#130067)
This completes the PreEmitPasses.
2025-04-14 10:19:42 +05:30
Akshat Oke
2f6b06b264
[CodeGen][NPM] Port PostRAHazardRecognizer to NPM (#130066) 2025-04-09 16:36:22 +05:30
Akshat Oke
4a68702455
[CodeGen][NPM] Port XRayInstrumentation to NPM (#129865) 2025-04-01 15:38:49 +05:30
Mingming Liu
c8a70f4c6e
[CodeGen][StaticDataPartitioning]Place local-linkage global variables in hot or unlikely prefixed sections based on profile information (#125756)
In this PR, static-data-splitter pass finds out the local-linkage global
variables in {`.rodata`, `.data.rel.ro`, `bss`, `.data`} sections by
analyzing machine instruction operands, and aggregates their accesses
from code across functions.

A follow-up item is to analyze global variable initializers and count
for access from data.
* This limitation is demonstrated by `bss2` and `data3` in
`llvm/test/CodeGen/X86/global-variable-partition.ll`.

Some stats of static-data-splitter with this patch:

**section**|**bss**|**rodata**|**data**
:-----:|:-----:|:-----:|:-----:
hot-prefixed section coverage|99.75%|97.71%|91.30%
unlikely-prefixed section size percentage|67.94%|39.37%|63.10%

1. The coverage is defined as `#perf-sample-in-hot-prefixed <data>
section / #perf-sample in <data.*> section` for each <data> section.
* The perf command samples
`MEM_INST_RETIRED.ALL_LOADS:u:pinned:precise=2` events at a high
frequency (`perf -c 2251`) for 30 seconds. The profiled binary is built
as non-PIE so `data.rel.ro` coverage data is not available.
2. The unlikely-prefixed `<data>` section size percentage is defined as
`unlikely <data> section size / the sum size of <data>.* sections` for
each `<data>` section
2025-03-28 16:31:46 -07:00
Akshat Oke
174110bf3c
[CodeGen][NPM] Port LiveDebugValues to NPM (#131563) 2025-03-24 11:34:45 +05:30
Akshat Oke
687c9d359e
[CodeGen][NPM] Port FEntryInserter to NPM (#129857) 2025-03-17 10:35:53 +05:30
Frederik Harwath
6962cf1700
Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)
This is meant as a preparation for PR #130988 "[AMDGPU] Implement IR
expansion for frem instruction" which implements the expansion of
another instruction in this pass. The more general name seems more
appropriate given this change and quite reasonable even without it.
2025-03-14 13:11:45 +01:00
Akshat Oke
87916f8c32
[CodeGen][NPM] Port MachineBlockPlacement to NPM (#129828) 2025-03-14 10:31:53 +05:30
Akshat Oke
5952972c91
[CodeGen][NPM] Port BranchFolder to NPM (#128858)
EnableTailMerge is false by default and is handled by the pass builder.
Passes are independent of target pipeline options.

This completes the generic `MachineLateOptimization` passes for the NPM
pipeline.
2025-03-13 13:41:28 +05:30
Akshat Oke
9f617161aa
[CodeGen][NPM] Port PatchableFunction to NPM (#129866) 2025-03-12 15:11:11 +05:30
Akshat Oke
57a90883ca
[CodeGen][NPM] Port DetectDeadLanes to NPM (#130567) 2025-03-12 11:22:02 +05:30
Vikram Hegde
e0eb4edad6
[CodeGen][NewPM] Port "FixupStatepointCallerSaved" pass to NPM (#129541) 2025-03-04 15:47:43 +05:30
Akshat Oke
af4ec59f8d
[CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509) 2025-03-04 11:49:09 +05:30
Vikram Hegde
6abe148bac
[CodeGen][NewPM] Port "RemoveRedundantDebugValues" to NPM (#129005) 2025-03-03 19:57:50 +07:00
Akshat Oke
77f44a9642
[CodeGen][NewPM] Port MachineSink to NPM (#115434)
Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for
the NPM pipeline in buildCodeGenPipeline(... &Opts, ...)
2025-03-03 15:49:37 +05:30
Akshat Oke
69c8312c0a
[CodeGen][NewPM] Port MachineCycleInfo to NPM (#114745) 2025-03-03 11:26:17 +05:30
Akshat Oke
fe13cb985c
[CodeGen][NewPM] Port RegAllocGreedy to NPM (#119540)
Leaving out NPM command line support for the next patch.
2025-02-26 12:11:22 +05:30
Akshat Oke
229dcf9d34
[CodeGen][NPM] Port MachineLateInstrsCleanup to NPM (#128160)
There are no standalone tests for this pass for backends implementing
the NPM yet.
2025-02-24 14:31:37 +05:30
Akshat Oke
7b60e03d73
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
`RegisterClassInfo` was supposed to be kept alive between pass runs,
which wasn't being done leading to recomputations increasing the compile
time.

Now the Impl class is a member of the legacy and new passes so that it
is not reconstructed on every pass run.

---------

Co-authored-by: Christudasan Devadasan <christudasan.devadasan@amd.com>
2025-02-12 18:54:39 +05:30
Akshat Oke
564b9b7f4d
Revert "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126268)
This reverts commit 5aa4979c47255770cac7b557f3e4a980d0131d69 while I
investigate what's causing the compile-time regression.
2025-02-08 15:36:48 +05:30
Christudasan Devadasan
d86e379fd2
[CodeGen][NewPM] Port StackSlotColoring to NPM. (#125876) 2025-02-05 23:18:16 +05:30
Akshat Oke
f77f777f35
[CodeGen][NewPM] Port RenameIndependentSubregs to NPM (#125192) 2025-02-05 17:54:57 +05:30
Christudasan Devadasan
44f638f88e
CodeGen][NewPM] Port PostRAScheduler to NPM. (#125798) 2025-02-05 12:45:59 +05:30
Christudasan Devadasan
5aa4979c47
CodeGen][NewPM] Port MachineScheduler to NPM. (#125703) 2025-02-05 12:17:59 +05:30
Akshat Oke
4313345f2e
[CodeGen][NewPM] Port MachineCopyPropagation to NPM (#125202) 2025-02-04 15:45:03 +05:30
Akshat Oke
fe9a97ca38
[CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698) 2025-02-03 13:41:51 +07:00
Mingming Liu
de209fa11b
[CodeGen] Introduce Static Data Splitter pass (#122183)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition static data sections.

This patch introduces a codegen pass. This patch produces jump table
hotness in the in-memory states (machine jump table info and entries).
Target-lowering and asm-printer consume the states and produce `.hot`
section suffix. The follow up PR
https://github.com/llvm/llvm-project/pull/122215 implements such
changes.

---------

Co-authored-by: Ellis Hoag <ellis.sparky.hoag@gmail.com>
2025-01-22 21:06:46 -08:00
Akshat Oke
3ace18d5c0
[CodeGen] MachineFunctionSplitter: Add missing initializer (#123564)
This registers the pass with PassRegistry so we can use -start-before
and other options for machine-function-splitter.
2025-01-20 16:56:46 +05:30
Akshat Oke
2c7ece2e8c
[CodeGen][NewPM] Port LiveStacks analysis to NPM (#118778) 2024-12-06 15:16:07 +05:30
Akshat Oke
d9b4bdbff5
[CodeGen][NewPM] Port LiveDebugVariables to NPM (#115468)
The existing analysis was already a pimpl wrapper.

I have extracted legacy pass logic to a LDVImpl wrapper named
`LiveDebugVariables` which is the analysis::Result now. This controls
whether to activate the LDV (depending on `-live-debug-variables` and
DIsubprogram) itself.

The legacy and new analysis only construct the LiveDebugVariables.

VirtRegRewriter will test this.
2024-12-04 14:31:34 +05:30
Akshat Oke
3f9d02aae8
[CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326)
With this, all machine SSA optimization passes are available in the new codegen pipeline.
2024-11-18 11:02:01 +05:30
Akshat Oke
47928ab16b
[CodeGen][NewPM] Port RegUsageInfoPropagation pass to NPM (#114010) 2024-11-15 12:06:02 +05:30
Akshat Oke
2de1e06736
[CodeGen][NewPM] Port RegUsageInfoCollector pass to NPM (#113874) 2024-11-15 12:00:09 +05:30
Akshat Oke
44d0e9522a
[CodeGen][NewPM] Port TailDuplicate pass to NPM (#113293) 2024-10-30 11:48:40 +05:30
Akshat Oke
c4c60c0db9
[CodeGen][NewPM] Port OptimizePHIs to NPM (#113433) 2024-10-23 16:55:21 +05:30
Akshat Oke
93802815ab
[NewPM][CodeGen] Port VirtRegMap to NPM (#109936) 2024-10-22 15:15:56 +05:30
Christudasan Devadasan
488d3924dd
[CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508) 2024-10-16 13:22:57 +05:30
Akshat Oke
cd6c2b80be
[NewPM][CodeGen] Port StackColoring to NPM (#111812) 2024-10-14 19:23:34 +05:30