224271 Commits

Author SHA1 Message Date
Aaron Puchert
b20da5117f Don't add irrelevant items to queue in DwarfCompileUnit::createScopeChildrenDIE (NFC)
Instead of popping them and then immediately throwing them away, we can
just filter out globals and items in different scopes before adding them
to WorkList. Shouldn't change anything but keep the queue smaller.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D113864
2021-11-17 00:01:20 +01:00
Aaron Puchert
86b3100cde [DebugInfo] Use DbgEntityKind in DbgEntity interface (NFC)
It was being used occasionally already, and using it on the constructor
and getDbgEntityID has obvious type safety benefits.

Also use llvm_unreachable in the switch as usual, but since only these
two values are used in constructor calls I think it's still NFC.

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D113862
2021-11-17 00:01:20 +01:00
Benjamin Kramer
8b8e8704ce [PowerPC] Fix a nullptr dereference
LiMI1/LiMI2 can be null, so don't call a method on them before checking.
Found by ubsan.
2021-11-16 23:52:42 +01:00
David Green
4e37e32563 [ARM] Update test comments after D114018. NFC
The TODOs are now fixed as of D114018, so can be removed. Which is nice.
2021-11-16 22:48:45 +00:00
Leonard Chan
b75cc51df7 Limit test to x86 for now. 2021-11-16 14:46:02 -08:00
Duncan P. N. Exon Smith
77898a4c0c Coverage: Fix iterated type for LineCoverageIterator
LineCoverageIterator is not providing access to a mutable object. Fix it
to iterate over `const LineCoverageStats` so that `operator->()`
compiles again after 6b9b86db9dd974585a5c71cf2e5231d1e3385f7c.
2021-11-16 14:39:30 -08:00
Leonard Chan
25bcd94234 [llvm-objcopy] Add --update-section
This is another attempt at D59351 which attempted to add --update-section, but
with some heuristics for adjusting segment/section offsets/sizes in the event
the data copied into the section is larger than the original size of the section.
We are opting to not support this case. GNU's objcopy was able to do this because
the linker and objcopy are tightly coupled enough that segment reformatting was
simpler. This is not the case with llvm-objcopy and lld where they like to be separated.

This will attempt to copy data into the section without changing any other
properties of the parent segment (if the section is part of one).

Differential Revision: https://reviews.llvm.org/D112116
2021-11-16 14:10:40 -08:00
Simon Pilgrim
aeb3c772d3 [X86] Add shift by splat modulo amount vector tests
Shows failure to fold zero_extend_vector_inreg(and(x, c)) -> bitcast(and(x,c')) when we're only demanding the 0'th extended element, such as with the SSE variable shift ops.
2021-11-16 20:46:17 +00:00
Philip Reames
8d85e945b2 [SCEV] Canonicalize X - urem X, Y patterns
There are multiple possible ways to represent the X - urem X, Y pattern. SCEV was not canonicalizing, and thus, depending on which you analyzed, you could get different results. The sub representation appears to produce strictly inferior results in practice, so I decided to canonicalize to the Y * X/Y version.

The motivation here is that runtime unroll produces the sub X - (and X, Y-1) pattern when Y is a power of two. SCEV is thus unable to recognize that an unrolled loop exits because we don't figure out that the new unrolled step evenly divides the trip count of the unrolled loop. After instcombine runs, we convert the the andn form which SCEV recognizes, so essentially, this is just fixing a nasty pass ordering dependency.

The ARM loop hardware interaction in the test diff is opague to me, but the comments in the review from others knowledge of the infrastructure appear to indicate these are improvements in loop recognition, not regressions.

Differential Revision: https://reviews.llvm.org/D114018
2021-11-16 11:59:21 -08:00
Arthur Eubanks
c95a9f46c9 [Loads] Handle addrspacecast constant expressions when determining dereferenceability
Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D114015
2021-11-16 11:17:57 -08:00
Victor Huang
ae27ca9a67 [PowerPC] PPC backend optimization on conditional trap intrustions
This patch adds PPC back end optimization to analyze the arguments of a
conditional trap instruction to execute one of the following:
1. Delete it if never trap
2. Replace it if always trap
3. Otherwise keep it

Reviewed By: nemanjai, amyk, PowerPC

Differential revision: https://reviews.llvm.org/D111434
2021-11-16 13:11:57 -06:00
Arthur Eubanks
877d6e9b9a [test] Precommit test for D114015 2021-11-16 11:07:20 -08:00
Hongtao Yu
042cefd2b5 [CSSPGO] Fix a hash code truncating issue in ContextTrieNode.
std::hash returns a 64bit hash code while previously we were using only lower 32 bits which caused hash collision for large workloads.

Reviewed By: wenlei, wlei

Differential Revision: https://reviews.llvm.org/D113688
2021-11-16 11:01:52 -08:00
River Riddle
4c484f11d3 [llvm] Add a SFINAE template parameter to DenseMapInfo
This allows for using SFINAE partial specialization for DenseMapInfo.
In MLIR, this is particularly useful as it will allow for defining partial
specializations that support all Attribute, Op, and Type classes without
needing to specialize DenseMapInfo for each individual class.

Differential Revision: https://reviews.llvm.org/D113641
2021-11-16 18:54:14 +00:00
Mircea Trofin
c6b9b702a0 [NFC][Regalloc] Factor out eviction decision from eviction attempt
This splits tryEvict into a const tryFindEvictionCandidate, which
attempts to find a candidate, and the actual eviction (should the former
be successful)

The newly introduced tryFindEvictionCandidate will move subsequently
into the RegAllocEvictionAdvisor.

RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-November/153639.html

Differential Revision: https://reviews.llvm.org/D113941
2021-11-16 10:50:23 -08:00
Mircea Trofin
1ee32055ea Reland "[benchmarks] Move libcxx's fork of google/benchmark and llvm/utils'""
This reverts commit e7568b68da8a216dc22cdc1c6d8903c94096c846 and relands
c6f7b720ecfa6db40c648eb05e319f8a817110e9.

The culprit was: missed that libc also had a dependency on one of the
copies of `google-benchmark`

Also opportunistically fixed indentation from prev. change.

Differential Revision: https://reviews.llvm.org/D112012
2021-11-16 10:33:31 -08:00
Duncan P. N. Exon Smith
fd6018072a DebugInfo: Make DWARFExpression::iterator a const iterator
3d1d8c767be5537eb5510ee0522e2f3475fe7c04 made
DWARFExpression::iterator's Operation member `mutable`. After a few prep
commits, the iterator can instead be made a `const` iterator since no
caller can change the Operation.

Differential Revision: https://reviews.llvm.org/D113958
2021-11-16 10:25:10 -08:00
Duncan P. N. Exon Smith
a0f1f17131 DebugInfo: Stop modifying Operation::Error inside of verify()
The only caller of Operation::verify() is DWARFExpression::verify(),
which iterates past the (ephemeral) Operation immediately after.

- Stop setting Operation::Error because the mutation will never be
  observed.
- Change verify() to a static function to be sure all callers are
  updated.

Differential Revision: https://reviews.llvm.org/D113957
2021-11-16 10:21:04 -08:00
Mircea Trofin
e7568b68da Revert "[benchmarks] Move libcxx's fork of google/benchmark and llvm/utils'"
This reverts commit c6f7b720ecfa6db40c648eb05e319f8a817110e9.

Some buildbots are failing, will investigate and reland.
Example:
  https://lab.llvm.org/buildbot#builders/138/builds/14067
  https://lab.llvm.org/buildbot#builders/73/builds/20159
2021-11-16 09:28:50 -08:00
Philip Reames
3dd6d5b628 [tests] Add coverage for different forms of X - urem X, Y 2021-11-16 09:26:34 -08:00
Philip Reames
56ae2cfecf autogen a SCEV test file 2021-11-16 09:26:34 -08:00
Mircea Trofin
c6f7b720ec [benchmarks] Move libcxx's fork of google/benchmark and llvm/utils'
under third-party

This change:
- moves the libcxx copy of `google/benchmark` to
`third-party/benchmkark`
- points the 2 uses of the library (libcxx and llvm/utils) to this copy

We picked the licxx copy because it is the most up to date.

Differential Revision: https://reviews.llvm.org/D112012
2021-11-16 09:16:11 -08:00
Kazu Hirata
ee0133dc6d [llvm] Use range-for loops (NFC) 2021-11-16 09:01:56 -08:00
Philip Reames
ed6b69a38f Add a hasPoisonGeneratingFlags proxy wrapper to Instruction [NFC]
This just cuts down on casts to Operator.
2021-11-16 08:48:16 -08:00
David Sherwood
4607459022 [AArch64] Fix TypeSize->uint64_t implicit conversion in AArch64ISelLowering::hasAndNot
For now I've just changed the code to only return true from
AArch64ISelLowering::hasAndNot if the vector is fixed-length.
Once we have the right patterns or DAG combines to use bic/bif
we can also enable this for SVE.

Test added here:

  CodeGen/AArch64/vselect-constants.ll

Differential Revision: https://reviews.llvm.org/D113994
2021-11-16 16:25:16 +00:00
Florian Hahn
be56ece918
[llvm-reduce] Move code to check chunk to function, to enable reuse (NFC).
This patch moves the logic to clone and check a new chunk into a new
function, to allow re-use in a follow-up patch that implements parallel
reductions.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D113856
2021-11-16 15:39:13 +00:00
LLVM GN Syncbot
e993c6e8f8 [gn build] Port 5baa4ee30b5c 2021-11-16 14:52:00 +00:00
Jon Chesterfield
30b29db7c7 [amdgpu] Don't crash on empty global ctor/dtor
Global ctor/dtor can be an empty array, which is a Constant not a
ConstantArray. The cast<ConstantArray> therefore asserts / crashes.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D113800
2021-11-16 14:36:08 +00:00
Sanjay Patel
8fce94f916 [InstCombine] canonicalize icmp with trunc op into mask and cmp, part 2
If C is a high-bit mask:
(trunc X) u< C --> (X & C) != C (are any masked-high-bits clear?)

If C is low-bit mask:
(trunc X) u> C --> (X & ~C) != 0 (are any masked-high-bits set?)

If C is not-of-power-of-2 (one clear bit):
(trunc X) u> C --> (X & (C+1)) == C+1 (are all masked-high-bits set?)

This extends the fold added with:
acabad9ff6bf (https://alive2.llvm.org/ce/z/aFr7qV)

Using decomposeBitTestICmp() to generalize this is a planned follow-up, but that requires removing an inverse fold.

Here are Alive2 generalizations for these folds:
https://alive2.llvm.org/ce/z/u-ZpC_ (ult, the previous patch)
https://alive2.llvm.org/ce/z/YsuAu2 (ult, this patch)
https://alive2.llvm.org/ce/z/ekktQP (ugt, low bitmask)
https://alive2.llvm.org/ce/z/pJY9wR (ugt, one clear bit)

Differential Revision: https://reviews.llvm.org/D112634
2021-11-16 09:27:30 -05:00
Alexey Bataev
900cc1a226 [SLP]Improve cost of the gather nodes.
No need to count the final shuffle cost for the constants, gathering of
the constants is just a constant vector + extra inserts, if required.

Differential Revision: https://reviews.llvm.org/D113770
2021-11-16 06:25:07 -08:00
Jake Egan
2f43a656f3 [AIX] XFAIL lto-comp-dir.ll for lack of .file directive support
This test explicitly checks for .file directives, which is not currently supported on AIX. This patch sets this test to XFAIL on AIX for now.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D113640
2021-11-16 09:15:00 -05:00
Alexey Bataev
cdf8a53c1d [SLP]Fix windows build, NFC.
Need to put `IndexIdx` var to the list of captures.
2021-11-16 06:09:51 -08:00
Alexey Bataev
aa9bbb64be [SLP]Adjust GEP indices types when trying to build entries.
Need to adjust the types of GEPs indices when building the tree
entries/operands. Otherwise some of the nodes might differ and
vectorizer is unable to correctly find them and count their cost.

Differential Revision: https://reviews.llvm.org/D113792
2021-11-16 05:44:33 -08:00
Alexey Bataev
51c0b6843a [SLP][NFC]Add more tests for shuffles that can be optimized after SLP,
NFC.
2021-11-16 05:42:18 -08:00
Florian Hahn
97b9b6f565
[llvm-reduce] Add new BitWriter dependency after 28d95a26109e. 2021-11-16 12:48:21 +00:00
Sander.DeSmalen@arm.com
305816ff1e [IndVarSimplify] Reduce nondeterministic behaviour in visitIVCast.
rGf39978b84f1d3a1da6c32db48f64c8daae64b3ad led to and/or exposed
an issue with IndVarSimplification for a loop where a i32 phi node is
no longer replaced by a widened (i64) phi node, because the SCEVs of a
sign-extend no longer folded the same way. I'm unsure how to properly
explain this because it's all rather complicated, but in short: SCEVs
don't fold as nicely as they used to and this caused a difference.

While investigating this, I found that IndVarSimplify can actually
optimise the case in the way we want to if it chooses the widened IV to
be 'signed' (the i32 IV is both sign and zero-extended). Oddly enough,
there is some level of indeterminism in the way the algorithm works,
it just picks the sign of the 'first' zext/sext user, where the order of
the users-iterator is not guaranteed to be the same on each invocation
of the pass (e.g. shown by first running loop-rotate, which puts the
users in a different order).

While I think the fix is valid in the sense that consistently picking
_any_ order is better than having an nondeterministic order, I can
use a bit of advice from people more familiar in this area of the
code-base.

For example, I'm not sure if this fix is hiding another issue where the
IndVarSimplify pass could actually draw the same conclusions (i.e. that
it only needs an i64 phi node) if it does a bit more work, regardless
of whether it chooses the induction variable to be signed or unsigned.

I'm also not sure if choosing signed is better than unsigned, or whether
that just happens to be beneficial only in this individual case.

Any feedback would be much appreciated!

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D112573
2021-11-16 12:41:04 +00:00
Florian Hahn
28d95a2610
[llvm-reduce] Allow writing temporary files as bitcode.
Textual LLVM IR files are much bigger and take longer to write to disk.
To avoid the extra cost incurred by serializing to text, this patch adds
an option to save temporary files as bitcode instead.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D113858
2021-11-16 12:39:42 +00:00
Florian Hahn
b7aec4f08e
[SCEV] Support rewriting ZExt expressions with loop guard info.
So far, applying loop guard information has been restricted to
SCEVUnknown. In a few cases, like PR40961 and PR52464, this leads to
SCEV failing to determine tight upper bounds for the backedge taken
count.

This patch adjusts SCEVLoopGuardRewriter and applyLoopGuards to support
re-writing ZExt expressions.

This is a first step towards fixing  PR40961 and PR52464.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D113577
2021-11-16 11:16:07 +00:00
Matt Devereau
f526c600c0 [AArch64][SVE] Instcombine SVE LD1/ST1 to stock LLVM IR
InstCombine AArch64 LD1/ST1 to llvm.masked.load/llvm.masked.store
and LD1/ST1 to load/store when a ptrue all predicate pattern operand
is present.

This allows existing IR optimizations such as dead-load removal to
occur.

Differential Revision: https://reviews.llvm.org/D113489
2021-11-16 11:10:23 +00:00
Frederik Gossen
3f3d4e8a15 Fix unused variable warning in LoadStoreOpt.cpp with (void) 2021-11-16 12:03:59 +01:00
Frederik Gossen
2bceb7c8da Revert "Fix unused variable in llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp"
This reverts commit 40a609aebe4ab51174a164852b6399f322bf6d9a.
2021-11-16 12:00:17 +01:00
Frederik Gossen
ecfe7a3404 Revert "Fix unused variable warning."
This reverts commit a062e2a8ca27b615cf3d02ed5c551ca85efc0325.
2021-11-16 11:59:34 +01:00
Frederik Gossen
9a6817b7ed Revert "Fix another unused variable error."
This reverts commit 5b84ae7c48083bd0f40199837990cf915a2053b8.
2021-11-16 11:58:02 +01:00
Adrian Kuegel
5b84ae7c48 Fix another unused variable error. 2021-11-16 11:32:44 +01:00
Adrian Kuegel
a062e2a8ca Fix unused variable warning. 2021-11-16 11:17:33 +01:00
Frederik Gossen
40a609aebe Fix unused variable in llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp 2021-11-16 11:05:18 +01:00
David Green
309f1e4ac8 [ARM] Add datalayout to costmodel tests. NFC
This adds a sensible datalayout to the ARM cost model tests, to prevent
the costs reported being incorrect for the size of pointers.
2021-11-16 09:49:42 +00:00
Kai Luo
c0da8a4e40 [CGP][PowerPC] Pre-commit test case for D113872. NFC. 2021-11-16 09:18:49 +00:00
Amara Emerson
dcd8728d83 Remove unnecessary <any> include. 2021-11-16 00:50:30 -08:00
jacquesguan
6405e8b584 [RISCV] Refactor some rvv instructions' definition with foreach.
Simplify rvv instructions that use eew in their mnemonic and encoding with foreach. And fix a scheduling bug.

Differential Revision: https://reviews.llvm.org/D113453
2021-11-16 15:20:45 +08:00