63 Commits

Author SHA1 Message Date
Chris Lattner
596875118c rename MachineInstr::setInstrDescriptor -> setDesc
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
Evan Cheng
7250120177 Only mark instructions that load a single value without extension as isSimpleLoad = 1.
llvm-svn: 45727
2008-01-07 23:56:57 +00:00
Chris Lattner
03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner
e99a6caee4 Rename all the M_* flags to be namespace qualified enums, and switch
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.

llvm-svn: 45692
2008-01-07 06:42:05 +00:00
Chris Lattner
b0d06b4381 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
Chris Lattner
f0f438a517 remove MachineOpCode typedef.
llvm-svn: 45679
2008-01-07 02:48:55 +00:00
Chris Lattner
a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Owen Anderson
2a3be7bb6c Move even more functionality from MRegisterInfo into TargetInstrInfo.
Some day I'll get it all moved over...

llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Chris Lattner
a4ce4f6987 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
llvm-svn: 45667
2008-01-06 23:38:27 +00:00
Owen Anderson
6bb0c52628 Move some more functionality from MRegisterInfo to TargetInstrInfo.
llvm-svn: 45603
2008-01-04 23:57:37 +00:00
Owen Anderson
eee14601b1 Move some more instruction creation methods from RegisterInfo into InstrInfo.
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner
25568e4cef Fix a problem where lib/Target/TargetInstrInfo.h would include and use
a header file from libcodegen.  This violates a layering order: codegen
depends on target, not the other way around.  The fix to this is to 
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen.  It is defined in libcodegen, where 
the base is not.

llvm-svn: 45475
2008-01-01 01:03:04 +00:00
Owen Anderson
7a73ae9a86 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
2007-12-31 06:32:00 +00:00
Chris Lattner
a5bb370aa4 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
5c4637816e Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
b3fd2d7b63 use simplified operand addition methods.
llvm-svn: 45437
2007-12-30 01:01:54 +00:00
Chris Lattner
f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Dan Gohman
9da02f5ee2 Remove isReg, isImm, and isMBB, and change all their users to use
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
2007-09-14 20:33:02 +00:00
Owen Anderson
e2f23a3abf Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!

llvm-svn: 41758
2007-09-07 04:06:50 +00:00
Dale Johannesen
85ee72f7ba ARM: make branch folder remove unconditional branches
following jump tables that it earlier inserted.  This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).

llvm-svn: 39782
2007-07-12 16:45:35 +00:00
Evan Cheng
9d41b311fb Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit.
llvm-svn: 38501
2007-07-10 18:08:01 +00:00
Evan Cheng
3650b2c278 Incorrect check.
llvm-svn: 37962
2007-07-06 23:23:19 +00:00
Evan Cheng
94f04c6fc9 Reflects the chanegs made to PredicateOperand.
llvm-svn: 37898
2007-07-05 07:18:20 +00:00
Dan Gohman
e8c1e428f2 Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
2007-06-26 00:48:07 +00:00
Dan Gohman
9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
2007-06-19 01:48:05 +00:00
Evan Cheng
a7ca624028 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
llvm-svn: 37643
2007-06-19 01:26:51 +00:00
Evan Cheng
36b1f5476e Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt.
llvm-svn: 37606
2007-06-15 21:15:00 +00:00
Dale Johannesen
c68554683d Handle blocks with 2 unconditional branches in AnalyzeBranch.
llvm-svn: 37571
2007-06-13 17:59:52 +00:00
Evan Cheng
5514bbef46 Add a utility routine to check for unpredicated terminator instruction.
llvm-svn: 37528
2007-06-08 21:59:56 +00:00
Evan Cheng
6740da9407 Fix ARM condition code subsumission check.
llvm-svn: 37517
2007-06-08 09:14:47 +00:00
Evan Cheng
842be09d86 Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks.
llvm-svn: 37484
2007-06-07 01:37:54 +00:00
Evan Cheng
2d91a4fd6a Add missing const qualifiers.
llvm-svn: 37342
2007-05-29 18:42:18 +00:00
Evan Cheng
1d764eca98 Hooks for predication support.
llvm-svn: 37308
2007-05-23 07:22:05 +00:00
Evan Cheng
8c8afb27d7 Fix some -march=thumb regressions. tBR_JTr is not predicable.
llvm-svn: 37272
2007-05-21 23:17:32 +00:00
Evan Cheng
147b334b6a BlockHasNoFallThrough() now returns true if block ends with a return instruction; AnalyzeBranch() should ignore predicated instructionsd.
llvm-svn: 37268
2007-05-21 18:56:31 +00:00
Evan Cheng
e20dd92792 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
llvm-svn: 37193
2007-05-18 00:18:17 +00:00
Evan Cheng
dcff2eb0e8 PredicateInstruction returns true if the operation was successful.
llvm-svn: 37124
2007-05-16 21:53:07 +00:00
Evan Cheng
e2762c3d68 Removed isPredicable().
llvm-svn: 37119
2007-05-16 20:50:23 +00:00
Evan Cheng
ad3aac71ce Hooks for predication support.
llvm-svn: 37093
2007-05-16 02:01:49 +00:00
Evan Cheng
0f7cbe8370 Add PredicateOperand to all ARM instructions that have the condition field.
llvm-svn: 37066
2007-05-15 01:29:07 +00:00
Dale Johannesen
4a00cf3fc4 Rewrite of Thumb constant islands handling (exact allowance for padding
around islands and jump tables).

llvm-svn: 36573
2007-04-29 19:19:30 +00:00
Evan Cheng
910c80851e Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
llvm-svn: 36483
2007-04-26 19:00:32 +00:00
Evan Cheng
8cd224e81c Relex assertions to account for additional implicit def / use operands.
llvm-svn: 36430
2007-04-25 07:12:14 +00:00
Anton Korobeynikov
fb80151c42 Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.

llvm-svn: 36146
2007-04-16 18:10:23 +00:00
Evan Cheng
e8315fe3f5 Inverted logic.
llvm-svn: 35619
2007-04-03 06:44:25 +00:00
Evan Cheng
7dbbd00b06 findRegisterUseOperand() changed.
llvm-svn: 35366
2007-03-26 22:41:48 +00:00
Evan Cheng
9bb01c9f4f Fix naming inconsistencies.
llvm-svn: 35163
2007-03-19 07:48:02 +00:00
Evan Cheng
ec13f826a2 Spill / restore should avoid modifying the condition register.
llvm-svn: 33971
2007-02-07 00:06:56 +00:00
Evan Cheng
95b85e34ff Copy and paste bug.
llvm-svn: 33658
2007-01-30 08:22:33 +00:00
Evan Cheng
ce8fa3ed83 Misseed thumb jumptable branch.
llvm-svn: 33656
2007-01-30 08:03:06 +00:00