7 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
bb4bece211 Add test case with randomly ordered insertions, massive coalescing.
Implement iterator::erase() in a simple version that erases nodes when they
become empty, but doesn't try to redistribute elements among siblings for better
packing.

Handle coalescing across leaf nodes which may require erasing entries.

llvm-svn: 120226
2010-11-27 21:12:36 +00:00
Jakob Stoklund Olesen
5e9c70ee57 Add B+-tree test case that creates a height 3 tree with a smaller root node.
Change temporary debugging code to write a dot file directly.

llvm-svn: 120171
2010-11-26 06:54:20 +00:00
Jakob Stoklund Olesen
c041268c8c Implement IntervalMap::clear().
llvm-svn: 119872
2010-11-19 23:28:57 +00:00
Jakob Stoklund Olesen
46389fda3b Support backwards iteration starting from end().
llvm-svn: 119871
2010-11-19 23:28:53 +00:00
Jakob Stoklund Olesen
345945e355 Add ADT/IntervalMap.
This is a sorted interval map data structure for small keys and values with
automatic coalescing and bidirectional iteration over coalesced intervals.

Except for coalescing intervals, it provides similar functionality to std::map.
It is however much more compact for small keys and values, and hopefully faster
too.

The container object itself can hold the first few intervals without any
allocations, then it switches to a cache conscious B+-tree representation. A
recycling allocator can be shared between many containers, even between
containers holding different types.

The IntervalMap is initially intended to be used with SlotIndex intervals for:

- Backing store for LiveIntervalUnion that is smaller and faster than std::set.

- Backing store for LiveInterval with less overhead than std::vector for typical
  intervals and O(N log N) merging of large intervals. 99% of virtual registers
  need 4 entries or less and would benefit from the small object optimization.

- Backing store for LiveDebugVariable which doesn't exist yet, but will track
  debug variables during register allocation.

This is a work in progress. Missing items are:

- Performance metrics.
- erase().
- insert() shrinkage.
- clear().
- More performance metrics.
- Simplification and detemplatization.

llvm-svn: 119787
2010-11-19 04:47:19 +00:00
Jakob Stoklund Olesen
09770251f6 Revert "Add ADT/IntervalMap.", GCC doesn't like it.
This reverts r119772.

llvm-svn: 119773
2010-11-19 01:21:03 +00:00
Jakob Stoklund Olesen
6d89171dcc Add ADT/IntervalMap.
This is a sorted interval map data structure for small keys and values with
automatic coalescing and bidirectional iteration over coalesced intervals.

Except for coalescing intervals, it provides similar functionality to std::map.
It is however much more compact for small keys and values, and hopefully faster
too.

The container object itself can hold the first few intervals without any
allocations, then it switches to a cache conscious B+-tree representation. A
recycling allocator can be shared between many containers, even between
containers holding different types.

The IntervalMap is initially intended to be used with SlotIndex intervals for:

- Backing store for LiveIntervalUnion that is smaller and faster than std::set.

- Backing store for LiveInterval with less overhead than std::vector for typical
  intervals and O(N log N) merging of large intervals. 99% of virtual registers
  need 4 entries or less and would benefit from the small object optimization.

- Backing store for LiveDebugVariable which doesn't exist yet, but will track
  debug variables during register allocation.

This is a work in progress. Missing items are:

- Performance metrics.
- erase().
- insert() shrinkage.
- clear().
- More performance metrics.
- Simplification and detemplatization.

llvm-svn: 119772
2010-11-19 01:14:40 +00:00