7431 Commits

Author SHA1 Message Date
Luo, Yuanke
979d876bb4 [X86][AMX] enable amx cast intrinsics in FE.
We have some discission in D99152 and llvm-dev and finially come up with
a solution to add amx specific cast intrinsics. We've support the
intrinsics in llvm IR. This patch is to replace bitcast with amx cast
intrinsics in code emitting in FE.

Differential Revision: https://reviews.llvm.org/D122567
2022-04-02 14:02:35 +08:00
wangyihan
907d3acefc [Clang][CodeGen]Beautify dump format, add indent for nested struct and struct members
Beautify dump format, add indent for nested struct and struct members, also fix test cases in dump-struct-builtin.c
for example:
struct:
```
  struct A {
    int a;
    struct B {
      int b;
      struct C {
        struct D {
          int d;
          union E {
            int x;
            int y;
          } e;
        } d;
        int c;
      } c;
    } b;
  };
```
Before:
```
struct A {
int a = 0
struct B {
    int b = 0
struct C {
struct D {
            int d = 0
union E {
                int x = 0
                int y = 0
                }
            }
        int c = 0
        }
    }
}
```
After:
```
struct A {
    int a = 0
    struct B {
        int b = 0
        struct C {
            struct D {
                int d = 0
                union E {
                    int x = 0
                    int y = 0
                }
            }
            int c = 0
        }
    }
}
```

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D122704
2022-03-31 07:38:37 +08:00
wangpc
cebbfd3d25 [RISCV] Add index check for vset/vget
Index of vset/vget must be a constant integer and be
located in right range.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D122629
2022-03-30 19:29:13 +08:00
Zakk Chen
10b2760da0 Revert "[RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR"
This reverts commit 10fd2822b77e12215b4ea82fc6d0a052961eb9d9.

I have a better implementation for those operations without the
additional policy operand.
masked compare and vmsbf/vmsif/vmsof are always tail agnostic so we could
assume undef maskedoff is mask agnostic.

Differential Revision: https://reviews.llvm.org/D122455
2022-03-29 18:05:33 -07:00
Phoebe Wang
cd26190a10 [X86][regcall] Support passing / returning structures
Currently, the regcall calling conversion in Clang doesn't match with
ICC when passing / returning structures. https://godbolt.org/z/axxKMKrW7

This patch tries to fix the problem to match with ICC.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D122104
2022-03-29 11:29:57 +08:00
Chenbing Zheng
d9ef6ad05f [RISCV] [NFC] add some tests for overloaded intrinsics of FP16
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D122564
2022-03-29 10:00:20 +08:00
Florian Hahn
8b245ab41d
[Clang,TBAA] Add test cases for nested pointers and TBAA data. 2022-03-27 19:59:37 +01:00
Florian Hahn
171cdba867
[Clang,TBAA] Use pattern for metadata reference in test.
Update the single check line that still had a hard-coded metadata
reference. This makes it more robust to slight changes in the metadata
numbering.
2022-03-25 18:12:39 +00:00
Johannes Doerfert
a81fff8afd Reapply "[Intrinsics] Add nocallback to the default intrinsic attributes"
This reverts commit c5f789050daab25aad6770790987e2b7c0395936 and
reapplies 7aea3ea8c3b33c9bb338d5d6c0e4832be1d09ac3 with additional test
changes.
2022-03-25 09:36:50 -05:00
Hubert Tong
ce21c926f8 [Clang] Work with multiple pragmas weak before definition
Update `WeakUndeclaredIdentifiers` to hold a collection of weak
aliases per identifier instead of only one.

This also allows the "used" state to be removed from `WeakInfo`
because it is really only there as an alternative to removing
processed map entries, and we can represent that using an empty set
now. The serialization code is updated for the removal of the field.
Additionally, a PCH test is added for the new functionality.

The records are grouped by the "target" identifier, which was already
being used as a key for lookup purposes. We also store only one record
per alias name; combined, this means that diagnostics are grouped by
the "target" and limited to one per alias (which should be acceptable).

Fixes PR28611.
Fixes llvm/llvm-project#28985.

Reviewed By: aaron.ballman, cebowleratibm

Differential Revision: https://reviews.llvm.org/D121927

Co-authored-by: Rachel Craik <rcraik@ca.ibm.com>
Co-authored-by: Jamie Schmeiser <schmeise@ca.ibm.com>
2022-03-24 20:17:49 -04:00
wangyihan
7faa95624e [clang][CodeGen]Fix clang crash and add bitfield support in __builtin_dump_struct
Fix clang crash and add bitfield support in __builtin_dump_struct.

In clang13.0.x, a struct with three or more members and a bitfield at
the same time will cause a crash. In clang15.x, as long as the struct
has one bitfield, it will cause a crash in clang.

Open issue: https://github.com/llvm/llvm-project/issues/54462

Differential Revision: https://reviews.llvm.org/D122248
2022-03-24 12:23:29 -07:00
Johannes Doerfert
c5f789050d Revert "[Intrinsics] Add nocallback to the default intrinsic attributes"
This reverts commit 7aea3ea8c3b33c9bb338d5d6c0e4832be1d09ac3 as it
breaks the buildbots.

I didn't see these failures in the pre-merge checks, looking into it.
2022-03-24 14:04:41 -05:00
Johannes Doerfert
7aea3ea8c3 [Intrinsics] Add nocallback to the default intrinsic attributes
Most intrinsics, especially "default" ones, will not call back into the
IR module. `nocallback` encodes this nicely. As it was not used before,
this patch also makes use of `nocallback` in the Attributor which
results in many more `norecurse` deductions.

Tablegen part is mechanical, test updates by script.

Differential Revision: https://reviews.llvm.org/D118680
2022-03-24 13:50:54 -05:00
Aaron Ballman
488c772920 Fix a crash with variably-modified parameter types in a naked function
Naked functions have no prolog, so it's not valid to emit prolog code
to evaluate the variably-modified type. This fixes Issue 50541.
2022-03-24 10:39:14 -04:00
Qiu Chaofan
895e5b2d80 [NFC] Format and uglify PowerPC intrinsics headers
This change formats PowerPC intrinsics wrapper headers into LLVM style,
and add extra prefix '__' to all variables to prevent conflict with user
code.
2022-03-24 21:14:55 +08:00
Qiu Chaofan
406bde9a15 [PowerPC] [Clang] Add SSE4 and BMI intrinsics implementation
Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D119407
2022-03-24 20:03:08 +08:00
Ben Shi
51585aa240 [clang][AVR] Implement standard calling convention for AVR and AVRTiny
This patch implements avr-gcc's calling convention:
https://gcc.gnu.org/wiki/avr-gcc#Calling_Convention

Reviewed By: aykevl

Differential Revision: https://reviews.llvm.org/D120720
2022-03-24 02:08:22 +00:00
Xiang1 Zhang
287dad13ab [InlineAsm] Fix mangle problem when global variable used in inline asm
(Add modifier P for ARR[BaseReg+IndexReg+..])

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D120887
2022-03-24 09:41:23 +08:00
Xiang1 Zhang
8a6b644c79 [Inline asm] Fix mangle problem when variable used in inline asm.
(Connect InlineAsm Memory Operand with its real value not just name)
Revert 2 history bugfix patch:

Revert "[X86][MS-InlineAsm] Make the constraint *m to be simple place holder"
This patch revert https://reviews.llvm.org/D115225 which mainly
fix problems intrduced by https://reviews.llvm.org/D113096

This reverts commit d7c07f60b35f901f5bd9153b11807124a9bdde60.

Revert "Reland "[X86][MS-InlineAsm] Use exact conditions to recognize MS global variables""
This patch revert https://reviews.llvm.org/D116090 which fix problem
intrduced by https://reviews.llvm.org/D115225

This reverts commit 24c68ea1eb4fc0d0e782424ddb02da9e8c53ddf5.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D120886
2022-03-24 09:41:22 +08:00
Arthur Eubanks
9bd66b312c [PassManager][Coroutine] Run passes under -O0 conditionally and run GlobalDCE
CoroSplit lowers various coroutine intrinsics. It's a CGSCC pass and
CGSCC passes don't run on unreachable functions. Normally GlobalDCE will
come along and delete unreachable functions, but we don't run GlobalDCE
under -O0, so an unreachable function with coroutine intrinsics may
never have CoroSplit run on it.

This patch adds GlobalDCE when coroutines intrinsics are present. It
also now runs all coroutine passes conditional when coroutine intrinsics
are present. This should also solve the -O0 regression reported in
D105877 due to LazyCallGraph construction.

Fixes https://github.com/llvm/llvm-project/issues/54117

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D122275
2022-03-23 11:03:26 -07:00
Nick Desaulniers
5a2e56b70e [Clang][NeonEmitter] emit ret decl first for -Wdeclaration-after-statement
The generated arm_neon.h header isn't -Wdeclaration-after-statement
compliant when targeting -mbig-endian. Update the generator to declare
the return value, if any, first before any other arguments that might
need to be "reversed" from little endian to big.

Another approach would have been to try to ignore this warning in system
headers, though that might not be precise for tokens involved in macro
expansion. See also: https://reviews.llvm.org/D116833#3236209.

Link: https://github.com/ClangBuiltLinux/linux/issues/1603
Fixes: https://github.com/llvm/llvm-project/issues/54062

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D122189
2022-03-23 09:40:43 -07:00
David Truby
683fc6203c [clang][AArc64][SVE] Implement vector-scalar operators
This patch extends the support for C/C++ operators for SVE
types to allow one of the arguments to be a scalar, in which
case a vector splat is performed.

Differential Revision: https://reviews.llvm.org/D121829
2022-03-23 14:20:48 +00:00
Zakk Chen
10fd2822b7 [RISCV] Add policy operand for masked compare and vmsbf/vmsif/vmsof IR
intrinsics.

Those operations are updated under a tail agnostic policy, but they
could have mask agnostic or undisturbed.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D120228
2022-03-22 07:47:21 -07:00
Alan Zhao
8cd8bd4a5c Implement __cpuid and __cpuidex as Clang builtins
https://reviews.llvm.org/D23944 implemented the #pragma intrinsic from
MSVC. This causes the statement #pragma intrinsic(cpuid) to fail [0]
on Clang because cpuid is currently implemented in intrin.h instead
of a Clang builtin. Reimplementing cpuid (as well as it's releated
function, cpuidex) should resolve this.

[0]: https://crbug.com/1279344

Differential revision: https://reviews.llvm.org/D121653
2022-03-18 18:13:52 +01:00
David Truby
f47e7e4a34 [clang][SVE] Add support for bitwise operators on SVE types
This patch implements support for the &, |, ^, and ~ operators on sizeless SVE
types.

Differential Revision: https://reviews.llvm.org/D121119
2022-03-18 14:06:47 +00:00
Kai Luo
9247145fba [PowerPC][NFC] Add atomic alignments and ops tests for powerpc
PowerPC is lacking tests checking `_Atomic` alignment in cfe. Adding these tests since we're going to make change to align with gcc on Linux.

Reviewed By: hubert.reinterpretcast, jsji

Differential Revision: https://reviews.llvm.org/D121441
2022-03-18 13:22:28 +08:00
Zahira Ammarguellat
bbf0d1932a Currently the control of the eval-method is mixed with fast-math.
FLT_EVAL_METHOD tells the user the precision at which, temporary results
are evaluated but when fast-math is enabled, the numeric values are not
guaranteed to match the source semantics, so the eval-method is
meaningless.
For example, the expression `x + y + z` has as source semantics `(x + y)
+ z`. FLT_EVAL_METHOD is telling the user at which precision `(x + y)`
is evaluated. With fast-math enable the compiler can choose to
evaluate the expression as `(y + z) + x`.
The correct behavior is to set the FLT_EVAL_METHOD to `-1` to tell the
user that the precision of the intermediate values is unknow. This
patch is doing that.

Differential Revision: https://reviews.llvm.org/D121122
2022-03-17 11:48:03 -07:00
Craig Topper
bbd2ecf9f0 [RISCV] Add +experimental-zvfh extension to cover half types in vectors.
Currently we allow half types in vectors if the scalar Zfh extension
is enabled. This behavior is not inline with the vector spec. For f32
and f64 types, the Zve32f, Zve64f, Zve64d, and V explicitly control
the availablity of floating point types in vectors.

In order to make our compiler compliant, we either need to remove all support
for half in vectors or we need an extension to control it.

Draft spec here https://github.com/riscv/riscv-v-spec/pull/780

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D121345
2022-03-17 10:04:02 -07:00
Matt Devereau
a9e08bc7c1 [AArch64][SVE] InstCombine llvm.aarch64.sve.sel to select
InstCombine llvm.aarch64.sve.sel to select. This allows an existing instCombine
added in 20b0fa91c9ee to fire.

Differential Revision: https://reviews.llvm.org/D121792
2022-03-17 16:20:48 +00:00
Kazushi (Jam) Marukawa
9df395bb68 [Clang][VE] Add vector mask intrinsics to clang
Add vector mask intrinsics instructions to clang.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D121816
2022-03-17 18:52:28 +09:00
Arthur Eubanks
2371c5a0e0 [OpaquePtr][ARM] Use elementtype on ldrex/ldaex/stlex/strex
Includes verifier changes checking the elementtype, clang codegen
changes to emit the elementtype, and ISel changes using the elementtype.

Basically the same as D120527.

Reviewed By: #opaque-pointers, nikic

Differential Revision: https://reviews.llvm.org/D121847
2022-03-16 14:11:53 -07:00
Thomas Lively
7e8913d775 [WebAssembly] Fix names of SIMD instructions containing '_zero'
Fix the instruction names to match the WebAssembly spec:

 - `i32x4.trunc_sat_zero_f64x2_{s,u}` => `i32x4.trunc_sat_f64x2_{s,u}_zero`
 - `f32x4.demote_zero_f64x2` => `f32x4.demote_f64x2_zero`

Also rename related things like intrinsics, builtins, and test functions to
match.

Reviewed By: aheejin

Differential Revision: https://reviews.llvm.org/D121661
2022-03-16 13:34:57 -07:00
David Truby
d38c9d3834 [NFC][clang][SVE] Auto-generate SVE operator tests. 2022-03-16 16:39:27 +00:00
Yonghong Song
3251ba2d0f [Attr] Fix a btf_type_tag AST generation
Current ASTContext.getAttributedType() takes attribute kind,
ModifiedType and EquivType as the hash to decide whether an AST node
has been generated or note. But this is not enough for btf_type_tag
as the attribute might have the same ModifiedType and EquivType, but
still have different string associated with attribute.

For example, for a data structure like below,
  struct map_value {
        int __attribute__((btf_type_tag("tag1"))) __attribute__((btf_type_tag("tag3"))) *a;
        int __attribute__((btf_type_tag("tag2"))) __attribute__((btf_type_tag("tag4"))) *b;
  };
The current ASTContext.getAttributedType() will produce
an AST similar to below:
  struct map_value {
        int __attribute__((btf_type_tag("tag1"))) __attribute__((btf_type_tag("tag3"))) *a;
        int __attribute__((btf_type_tag("tag1"))) __attribute__((btf_type_tag("tag3"))) *b;
  };
and this is incorrect.

It is very difficult to use the current AttributedType as it is hard to
get the tag information. To fix the problem, this patch introduced
BTFTagAttributedType which is similar to AttributedType
in many ways but with an additional BTFTypeTagAttr. The tag itself can
be retrieved with BTFTypeTagAttr.
With the new BTFTagAttributed type, the debuginfo code can be greatly
simplified compared to previous TypeLoc based approach.

Differential Revision: https://reviews.llvm.org/D120296
2022-03-16 08:46:52 -07:00
Kazushi (Jam) Marukawa
c2f62ab84b [Clang][VE] Add the rest of intrinsics to clang
Add the rest of intrinsics to clang except intrinsics using vector mask
registers.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D121586
2022-03-17 00:17:21 +09:00
Simon Moll
0aab344104 [Clang] Allow "ext_vector_type" applied to Booleans
This is the `ext_vector_type` alternative to D81083.

This patch extends Clang to allow 'bool' as a valid vector element type
(attribute ext_vector_type) in C/C++.

This is intended as the canonical type for SIMD masks and facilitates
clean vector intrinsic declarations.  Vectors of i1 are supported on IR
level and below down to many SIMD ISAs, such as AVX512, ARM SVE (fixed
vector length) and the VE target (NEC SX-Aurora TSUBASA).

The RFC on cfe-dev: https://lists.llvm.org/pipermail/cfe-dev/2020-May/065434.html

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D88905
2022-03-16 11:10:32 +01:00
Keith Smiley
a2db7d5e9c reland: [clang] Don't append the working directory to absolute paths
This fixes a bug that happens when using -fdebug-prefix-map to remap an
absolute path to a relative path. Since the path was absolute before
remapping, it is safe to assume that concatenating the remapped working
directory would be wrong.

This was originally submitted as https://reviews.llvm.org/D113718, but
reverted because when testing with dwarf 5 enabled, the tests were too
strict.

Differential Revision: https://reviews.llvm.org/D121663
2022-03-15 13:42:35 -07:00
Keith Smiley
cb22d71806 [clang] Fix DIFile directory root on Windows
On unix systems this logic would not separate the file and directory of
the DIFile unless they shared more components at the start than just the
root path character. The logic to do this was unix specific so it didn't
work on Windows. Now we check if the entire root_path is the same as
what you were going to set as the Dir and use the full filepath in that
case.

Differential Revision: https://reviews.llvm.org/D111579
2022-03-14 20:07:01 -07:00
Dávid Bolvanský
003c0b9307 [Clang] always_inline statement attribute
Motivation:

```
int test(int x, int y) {
    int r = 0;
    [[clang::always_inline]] r += foo(x, y); // force compiler to inline this function here
    return r;
}
```

In 2018, @kuhar proposed "Introduce per-callsite inline intrinsics" in https://reviews.llvm.org/D51200 to solve this motivation case (and many others).

This patch solves this problem with call site attribute. "noinline" statement attribute already landed in D119061. Also, some LLVM Inliner fixes landed so call site attribute is stronger than function attribute.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D120717
2022-03-14 21:45:31 +01:00
Arthur Eubanks
250620f76e [OpaquePtr][AArch64] Use elementtype on ldxr/stxr
Includes verifier changes checking the elementtype, clang codegen
changes to emit the elementtype, and ISel changes using the elementtype.

Reviewed By: #opaque-pointers, nikic

Differential Revision: https://reviews.llvm.org/D120527
2022-03-14 10:09:59 -07:00
Arthur Eubanks
4fc7c55fff [NewPM] Actually recompute GlobalsAA before module optimization pipeline
RequireAnalysis<GlobalsAA> doesn't actually recompute GlobalsAA.
GlobalsAA isn't invalidated (unless specifically invalidated) because
it's self-updating via ValueHandles, but can be imprecise during the
self-updates.

Rather than invalidating GlobalsAA, which would invalidate AAManager and
any analyses that use AAManager, create a new pass that recomputes
GlobalsAA.

Fixes #53131.

Differential Revision: https://reviews.llvm.org/D121167
2022-03-14 09:42:34 -07:00
Erich Keane
dc152659b4 Have cpu-specific variants set 'tune-cpu' as an optimization hint
Due to various implementation constraints, despite the programmer
choosing a 'processor' cpu_dispatch/cpu_specific needs to use the
'feature' list of a processor to identify it. This results in the
identified processor in source-code not being propogated to the
optimizer, and thus, not able to be tuned for.

This patch changes to use the actual cpu as written for tune-cpu so that
opt can make decisions based on the cpu-as-spelled, which should better
match the behavior expected by the programmer.

Note that the 'valid' list of processors for x86 is in
llvm/include/llvm/Support/X86TargetParser.def. At the moment, this list
contains only Intel processors, but other vendors may wish to add their
own entries as 'alias'es (or with different feature lists!).

If this is not done, there is two potential performance issues with the
patch, but I believe them to be worth it in light of the improvements to
behavior and performance.

1- In the event that the user spelled "ProcessorB", but we only have the
features available to test for "ProcessorA" (where A is B minus
features),
AND there is an optimization opportunity for "B" that negatively affects
"A", the optimizer will likely choose to do so.

2- In the event that the user spelled VendorI's processor, and the
feature
list allows it to run on VendorA's processor of similar features, AND
there
is an optimization opportunity for VendorIs that negatively affects
"A"s,
the optimizer will likely choose to do so. This can be fixed by adding
an
alias to X86TargetParser.def.

Differential Revision: https://reviews.llvm.org/D121410
2022-03-14 06:14:30 -07:00
Kazushi (Jam) Marukawa
b1b4b6f366 [Clang][VE] Add vector load intrinsics
Add vector load intrinsic instructions for VE.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D121049
2022-03-12 09:09:57 +09:00
David Truby
058c92f2a4 [clang][SVE] Add aarch64-registered-target to sve vector op tests
This fixes failing tests where aarch64 isn't available.
2022-03-11 16:01:00 +00:00
David Truby
3aca0ffd50 [clang][SVE] Add support for arithmetic operators on SVE types
This patch implements support for the +, -, *, / and % operators on sizeless SVE
types. Support for these operators on svbool_t is excluded.

Differential Revision: https://reviews.llvm.org/D120323
2022-03-11 15:39:44 +00:00
Matt Devereau
6c5da880e0 [AArch64][SVE][Clang] Fix crash for incorrect svptrue and svcnt parameters
Giving an int parameter to SVE intrinsics svptrue and svcnt caused Clang
to crash on compilation. Changing their parameter types to void instead of
omitting args results in a diagnostic error message instead.

Differential Revision: https://reviews.llvm.org/D121294
2022-03-11 11:19:53 +00:00
4vtomat
25df633c24 Split up large test files(over 10k lines) under clang/test/CodeGen/RISCV including:
The llvm pre-merge test got timeout due to large test files, this commit
split up the files that have over 10k lines under clang/test/CodeGen/RISCV
into even smaller ones.

Differential Revision: https://reviews.llvm.org/D121431
2022-03-10 19:13:39 -08:00
Phoebe Wang
4de9a752d6 [X86] Add helper enum for ternary intrinsics
Reviewed By: RKSimon, LuoYuanke

Differential Revision: https://reviews.llvm.org/D120307
2022-03-08 11:19:05 +08:00
Qiu Chaofan
b2497e5435 [PowerPC] Add generic fnmsub intrinsic
Currently in Clang, we have two types of builtins for fnmsub operation:
one for float/double vector, they'll be transformed into IR operations;
one for float/double scalar, they'll generate corresponding intrinsics.

But for the vector version of builtin, the 3 op chain may be recognized
as expensive by some passes (like early cse). We need some way to keep
the fnmsub form until code generation.

This patch introduces ppc.fnmsub.* intrinsic to unify four fnmsub
intrinsics.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D116015
2022-03-07 13:00:06 +08:00
Shao-Ce SUN
fa9c8bab0c [RISCV] Support k-ext clang intrinsics
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D112774
2022-03-05 13:57:18 +08:00