5981 Commits

Author SHA1 Message Date
Argyrios Kyrtzidis
5877df735d [Support/BLAKE3] CMake: Remove the workaround that checks for "CC=ccache /path/to/clang"
The LLVM builders that were doing that have been updated to use "-DLLVM_CCACHE_BUILD=ON" instead.
2022-04-03 21:02:02 -07:00
Kazu Hirata
e5121be910 Revert "Apply clang-tidy fixes for readability-redundant-declaration in Debug.cpp (NFC)"
This reverts commit 0fe01a9346658c0955b68b123f2b470b018114b1.

The commit caused build failures like:

  llvm/lib/Support/Debug.cpp:65:3: error: ‘setCurrentDebugTypes’ was
  not declared in this scope; did you mean ‘setCurrentDebugType’?
2022-04-03 08:14:11 -07:00
Kazu Hirata
1fe01a9346 Apply clang-tidy fixes for readability-redundant-declaration in Debug.cpp (NFC) 2022-04-03 08:04:12 -07:00
Kazu Hirata
c45d369ced Apply clang-tidy fixes for readability-redundant-member-init in YAMLParser.cpp (NFC) 2022-04-03 08:04:11 -07:00
Martin Storsjö
578d85e924 [Support] [BLAKE3] Fix compilation with CMAKE_OSX_ARCHITECTURES
With CMake, one can build for multiple macOS architectures
at the same time by setting CMAKE_OSX_ARCHITECTURES to multiple
architectures (avoiding needing to do two separate builds and
gluing the binaries together after the build).

In this case, while targeting x86_64 and arm64, neither IS_X64
nor IS_ARM64 is set, while compilation of the individual source
files will hit those cases (in either architecture mode).

Therefore, if we on the CMake level decide not to include the
architecture specific SIMD implementation files, also tell the
source this explicitly by passing the defines indicating that we
don't expect to use them.

Such a build clearly is less ideal than explicitly targeting one
architecture at a time if it won't include all the SIMD optimizations,
but that's a tradeoff that is up to the one deciding to do such an
universal build.

This also fixes builds for i386. The blake3 source code automatically
enables the SIMD implementations when building for i386, but we don't
provide the sources for that build configuration.

Differential Revision: https://reviews.llvm.org/D122884
2022-04-03 00:02:59 +03:00
Martin Storsjö
d0abdc22b8 [Support] [BLAKE3] Remove .hidden directives from windows-gnu assembly sources
COFF symbols don't have anything corresponding to a `.hidden` flag;
both GNU binutils as and LLVM's built-in assembler errors out on
these directives.

This reverts one part of
7f05aa2d4c36d6d53f97ac3e0db30ec600abbc62, fixing builds for
mingw x86_64.

Differential Revision: https://reviews.llvm.org/D122893
2022-04-02 23:58:31 +03:00
Argyrios Kyrtzidis
5426da8ffa [Support/BLAKE3] Re-enable building with the simd-optimized implementations, v2
* Support compiling with clang-5
* Check for `LLVM_DISABLE_ASSEMBLY_FILES` and have it set by
  `compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh`
  which wants to receive and process only bitcode files.
2022-03-31 01:00:03 -07:00
Ben Barham
3fda0edc51 [VFS] RedirectingFileSystem only replace path if not already mapped
If the `ExternalFS` has already remapped a path then the
`RedirectingFileSystem` should not change it to the originally provided
path. This fixes the original path always being used if multiple VFS
overlays were provided and the path wasn't found in the highest (ie.
first in the chain).

This also renames `IsVFSMapped` to `ExposesExternalVFSPath` and only
sets it if `UseExternalName` is true. This flag then represents that the
`Status` has an external path that's different from its virtual path.
Right now the contained path is still the external path, but further PRs
will change this to *always* be the virtual path. Clients that need the
external can then request it specifically.

Note that even though `ExposesExternalVFSPath` isn't set for all
VFS-mapped paths, `IsVFSMapped` was only being used by a hack in
`FileManager` that was specific to module searching. In that case
`UseExternalNames` is always `true` and so that hack still applies.

Resolves rdar://90578880 and llvm-project#53306.

Differential Revision: https://reviews.llvm.org/D122549
2022-03-30 11:52:41 -07:00
Chris Bieneman
9130e471fe Add DXContainer
DXIL is wrapped in a container format defined by the DirectX 11
specification. Codebases differ in calling this format either DXBC or
DXILContainer.

Since eventually we want to add support for DXBC as a target
architecture and the format is used by DXBC and DXIL, I've termed it
DXContainer here.

Most of the changes in this patch are just adding cases to switch
statements to address warnings.

Reviewed By: pete

Differential Revision: https://reviews.llvm.org/D122062
2022-03-29 14:34:23 -05:00
Mehdi Amini
267d1873fa Revert "[Support/BLAKE3] Re-enable building with the simd-optimized implementations"
This reverts commit 23519d3000b4703f17e639534a38b4f221fa4f63.

This breaks the build with clang-5:

/usr/bin/clang-5.0 -DBUILD_EXAMPLES -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib/Support/BLAKE3 -Illvm/lib/Support/BLAKE3 -Iinclude -Illvm/include -fPIC -O3 -DNDEBUG -MD -MT lib/Support/BLAKE3/CMakeFiles/LLVMSupportBlake3.dir/blake3_avx512_x86-64_unix.S.o -MF lib/Support/BLAKE3/CMakeFiles/LLVMSupportBlake3.dir/blake3_avx512_x86-64_unix.S.o.d -o lib/Support/BLAKE3/CMakeFiles/LLVMSupportBlake3.dir/blake3_avx512_x86-64_unix.S.o -c llvm/lib/Support/BLAKE3/blake3_avx512_x86-64_unix.S
...
llvm/lib/Support/BLAKE3/blake3_avx512_x86-64_unix.S:54:9: error: instruction requires: AVX-512 ISA
        kmovw k1, r9d
        ^
2022-03-29 17:43:37 +00:00
Chris Bieneman
5b6207f3cd [ADT] Flesh out HLSL raytracing environments
Fleshing this out now allows me to rely on enum math to translate
values rather than having to translate the off cases.

I should have added this in the first pass, but wasn't thinking about
it.
2022-03-29 09:43:03 -05:00
Argyrios Kyrtzidis
23519d3000 [Support/BLAKE3] Re-enable building with the simd-optimized implementations 2022-03-29 00:18:24 -07:00
Chris Bieneman
d394f9f897 Add HLSL Language Option and Preprocessor
Bringing in HLSL as a language as well as language options for each of
the HLSL language standards.

While the HLSL language is unimplemented, this patch adds the
HLSL-specific preprocessor defines which enables testing of the command
line options through the driver.

Reviewed By: pete, rnk

Differential Revision: https://reviews.llvm.org/D122087
2022-03-28 16:16:17 -05:00
Fangrui Song
c0eb9b4cde Revert D121984 "[RISCV][NFC] Moving RVV intrinsic type related util to llvm/Support"
This reverts commit ad57e10dbca2fdeff1448afc0aa1cf23d6df8736 and 1967fd8d5e7e40a987d8f65d163c7eb8f4b9e76f

llvm/lib/Support/RISCVVIntrinsicUtils.cpp introduced llvm/TableGen includes,
a circular dependency https://llvm.org/docs/CodingStandards.html#library-layering
I think this particular instance is serious and should be reverted.
2022-03-28 01:17:37 -07:00
Adrian Kuegel
268f24d2ea Revert "Revert "[RISCV][NFC] Remove unused header includes.""
Reland Remove unused header includes.
Add header includes that are needed, but previously were pulled in
transitively.
2022-03-28 10:01:50 +02:00
Adrian Kuegel
7c7e7770b7 Revert "[RISCV][NFC] Remove unused header includes."
This reverts commit 4edd7576dbb4917162c22e371c2464df90883bd1.
It seems we rely on transitive header includes here.
2022-03-28 09:48:14 +02:00
Adrian Kuegel
4edd7576db [RISCV][NFC] Remove unused header includes.
Keeping those includes would cause a dependency cycle between Support
and TableGen targets.

Differential Revision: https://reviews.llvm.org/D122555
2022-03-28 09:46:31 +02:00
Kito Cheng
ad57e10dbc [RISCV][NFC] Moving RVV intrinsic type related util to llvm/Support
This patch is split from https://reviews.llvm.org/D111617, we need those
stuffs on clang, so must moving those stuff to llvm/Support.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D121984
2022-03-28 14:35:28 +08:00
Mateusz Guzik
1a6d571174 [Support] Skip attempts to access /proc/self/fd on FreeBSD
In contrast to Linux it does not provide entries which can be readlinked
-- these are just regular files, not giving the expected outcome. That's
on top of procfs not being mounted by default to begin with.

This is probably the case on other BSDs as well, so I expect there will
be more ifdefs added down the road.

Reviewed By: emaste, dim

Differential Revision: https://reviews.llvm.org/D122545
2022-03-27 20:19:41 +02:00
Argyrios Kyrtzidis
b867f5c7b8 [Support/BLAKE3] Do manual instrumentation of llvm_blake3_hasher_finalize for memory sanitizer
This is to avoid false positives when using the uninstrumented assembly code implementation.
2022-03-25 09:59:27 -07:00
Nico Weber
c4eae8a4eb Make BLAKE3 a component library
It's unusual that BLAKE3/CMakeLists.txt just defines a list of
files that it injects into its parent scope. The list should either
be defined in llvm/lib/Support/CMakeLists.txt, or
llvm/lib/Support/BLAKE3/CMakeLists.txt should define an object
library.

This does the latter. It makes llvm/lib/Support/BLAKE3/CMakeLists.txt
more self-contained.

No behavior change.

Differential Revision: https://reviews.llvm.org/D122428
2022-03-24 21:16:55 -04:00
Argyrios Kyrtzidis
a9b70a8b7b [Support/BLAKE3] Temporarily disable building neon file to get builders back to green 2022-03-24 11:40:51 -07:00
Argyrios Kyrtzidis
418ecaba3e [Support/BLAKE3] Temporarily disable building the assembly files to get the builders back to green 2022-03-24 11:29:16 -07:00
Argyrios Kyrtzidis
7f05aa2d4c [Support/BLAKE3] LLVM-specific changes over the original BLAKE3 C implementation
Changes from original BLAKE3 sources:

* `blake.h`:
    * Changes to avoid conflicts if a client also links with its own BLAKE3 version:
        * Renamed the header macro guard with `LLVM_C_` prefix
        * Renamed the C symbols to add the `llvm_` prefix
    * Added a top header comment that references the CC0 license and points to the `LICENSE` file in the repo.
* `blake3_impl.h`: Added `#define`s to remove some of `llvm_` prefixes for the rest of the internal implementation.
* Implementation files:
    * Added a top header comment for `blake.c`
    * Used `llvm_` prefix for the C public API functions
    * Used `LLVM_LIBRARY_VISIBILITY` for internal implementation functions
    * Added `.private_extern`/`.hidden` in assembly files to reduce visibility of the internal implementation functions
* `README.md`:
    * added a note about where the sources originated from
    * Used the C++ BLAKE3 class and `llvm_` prefixed C API in place of examples and API documentation.
    * Removed instructions about how to build the files.
2022-03-24 10:26:39 -07:00
Argyrios Kyrtzidis
9aa701984d [Support] Introduce the BLAKE3 hashing function implementation
BLAKE3 is a cryptographic hash function that is secure and very performant.
The C implementation originates from https://github.com/BLAKE3-team/BLAKE3/tree/1.3.1/c
License is at https://github.com/BLAKE3-team/BLAKE3/blob/1.3.1/LICENSE

This patch adds:

* `llvm/include/llvm-c/blake3.h`: The BLAKE3 C API
* `llvm/include/llvm/Support/BLAKE3.h`: C++ wrapper of the C API
* `llvm/lib/Support/BLAKE3`: Directory containing the BLAKE3 C implementation files, including the `LICENSE` file
* `llvm/unittests/Support/BLAKE3Test.cpp`: unit tests for the BLAKE3 C++ wrapper

This initial patch contains the pristine BLAKE3 sources, a follow-up patch will introduce
LLVM-specific prefixes to avoid conflicts if a client also links with its own BLAKE3 version.

And here's some timings comparing BLAKE3 with LLVM's SHA1/SHA256/MD5.
Timings include `AVX512`, `AVX2`, `neon`, and the generic/portable implementations.
The table shows the speed-up multiplier of BLAKE3 for hashing 100 MBs:

|        Processor        | SHA1  | SHA256 |  MD5 |
|-------------------------|-------|--------|------|
| Intel Xeon W (AVX512)   | 10.4x |   27x  | 9.4x |
| Intel Xeon W (AVX2)     | 6.5x  |   17x  | 5.9x |
| Intel Xeon W (portable) | 1.3x  |  3.3x  | 1.1x |
|      M1Pro (neon)       | 2.1x  |  4.7x  | 2.8x |
|      M1Pro (portable)   | 1.1x  |  2.4x  | 1.5x |

Differential Revision: https://reviews.llvm.org/D121510
2022-03-24 10:26:39 -07:00
Keith Smiley
955cff803e reland: [AArch64] Add support for -march=native for Apple M1 CPU
This reverts commit fc3cdd0b295a04c38f01b391ae414553963e33b9.

The issue was imports being scoped to specific architectures for Apple
platforms.
2022-03-23 15:19:17 -07:00
Keith Smiley
fc3cdd0b29 Revert "[AArch64] Add support for -march=native for Apple M1 CPU"
This reverts commit fcca10c69aaab539962d10fcc59a5f074b73b0de.
2022-03-23 14:27:02 -07:00
Keith Smiley
fcca10c69a [AArch64] Add support for -march=native for Apple M1 CPU
This improves the getHostCPUName check for Apple M1 CPUs, which
previously would always be considered cyclone instead. This also enables
`-march=native` support when building on M1 CPUs which would previously
fail. This isn't as sophisticated as the X86 CPU feature checking which
consults the CPU via getHostCPUFeatures, but this is still better than
before. This CPU selection could also be invalid if this was run on an
iOS device instead, ideally we can improve those cases as they come up.

Differential Revision: https://reviews.llvm.org/D119788
2022-03-23 14:06:59 -07:00
Marcus Johnson
d14ccbc2e8 Re-land c3460689288abc98c91d8d6bffa74be9eb16c74d with fixes
It was previously reverted in a6beb18b845ca8548319d08df9eea46c87e1e533
due to test failures.
2022-03-23 08:13:17 -04:00
wangyihan
ff225019f0 [NFC][llvm][StringMap]Extract createTable and getHashTable functions and add the inline attribute to the getMinBucketToReserveForEntries function.
1. Extract createTable and getHashTable functions.
2. Add the inline attribute to the getMinBucketToReserveForEntries function.
3. Remove unnecessary local variable HTSize.

Statements in the following order appear in  llvm::StringMapImpl::init and llvm::StringMapImpl::RehashTable, so I extracted this code into a function. getHashTable is for the same reason, it appears in  llvm::StringMapImpl::FindKey,  llvm::StringMapImpl::LookupBucketFor and llvm::StringMapImpl::RehashTable.

```
auto **Table = static_cast<StringMapEntryBase **>(safe_calloc(
      NewNumBuckets + 1, sizeof(StringMapEntryBase **) + sizeof(unsigned)));

  // Allocate one extra bucket, set it to look filled so the iterators stop at
  // end.
  Table[NewNumBuckets] = (StringMapEntryBase *)2;
```

```
unsigned *HashTable = (unsigned *)(TheTable + NumBuckets + 1);
```

Reviewed By: skan, sepavloff

Differential Revision: https://reviews.llvm.org/D121934
2022-03-23 10:09:59 +08:00
Aaron Ballman
a6beb18b84 Revert "Add UTF32 to/from UTF8 conversion functions"
This reverts commit c3460689288abc98c91d8d6bffa74be9eb16c74d.

It broke at least one of the builders:
https://lab.llvm.org/buildbot#builders/100/builds/13947
2022-03-22 15:00:40 -04:00
Marcus Johnson
c346068928 Add UTF32 to/from UTF8 conversion functions
This is anticipated to be used in new format specifier checking code.
2022-03-22 13:41:43 -04:00
Tal Kedar
129311ac0b [libSupport] make CallBacksToRun static local
In order to allow compiling with -Werror=global-constructors with c++20 and above.

Discussion: https://discourse.llvm.org/t/llvm-lib-support-signals-cpp-fails-to-compile-due-to-werror-global-constructors/61070

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D122067
2022-03-19 20:31:04 +00:00
Chris Bieneman
95871187bf Add DXIL triple
This patch adds triple support for:

* dxil architecture
* shadermodel OS (with version parsing)
* shader stages as environment

Reviewed By: MaskRay, pete

Differential Revision: https://reviews.llvm.org/D122031
2022-03-19 00:17:43 -05:00
Ben Barham
4125524112 [VFS] Add print/dump to the whole FileSystem hierarchy
For now most are implemented by printing out the name of the filesystem,
but this can be expanded in the future. Only `OverlayFileSystem` and
`RedirectingFileSystem` are properly implemented in this patch.
  - `OverlayFileSystem`: Prints each filesystem in the order that any
    operations are actually run on them. Optionally prints recursively.
  - `RedirectingFileSystem`: Prints out all mappings, as well as the
    `ExternalFS`. Most of this was already implemented other than the
    handling for the `DirectoryRemap` case and to actually print out the
    mapping.

Each FS should implement `printImpl` rather than `print`, where the
latter just fowards to the former. This is to avoid spreading the
default arguments through to the subclasses (where we may miss updating
in the future).

Differential Revision: https://reviews.llvm.org/D121421
2022-03-17 13:02:40 -07:00
Craig Topper
bbd2ecf9f0 [RISCV] Add +experimental-zvfh extension to cover half types in vectors.
Currently we allow half types in vectors if the scalar Zfh extension
is enabled. This behavior is not inline with the vector spec. For f32
and f64 types, the Zve32f, Zve64f, Zve64d, and V explicitly control
the availablity of floating point types in vectors.

In order to make our compiler compliant, we either need to remove all support
for half in vectors or we need an extension to control it.

Draft spec here https://github.com/riscv/riscv-v-spec/pull/780

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D121345
2022-03-17 10:04:02 -07:00
serge-sans-paille
739572b40b Missing include in Support/Host.cpp under __MVS__ 2022-03-16 10:19:04 +01:00
wangyihan
bab468f253 [llvm][ADT] Remove duplicate code in llvm::StringMapImpl::RehashTable
Remove duplicate code in llvm::StringMapImpl::RehashTable, near StringMap.cpp:229

```
if (!NewTableArray[NewBucket]) {
  NewTableArray[FullHash & (NewSize - 1)] = Bucket;
  NewHashArray[FullHash & (NewSize - 1)] = FullHash;
  if (I == BucketNo)
    NewBucketNo = NewBucket;
  continue;
}
```

Reviewed By: MaskRay, dexonsmith

Differential Revision: https://reviews.llvm.org/D121726
2022-03-16 01:01:35 -07:00
Roman Lebedev
c62746ac6e
[X86] Fix AMD Znver3 model checks
While `-march=` is correctly detected as `znver3` for the cpu,
apparently the model check is incorrect:
```
$ lscpu
Architecture:            x86_64
  CPU op-mode(s):        32-bit, 64-bit
  Address sizes:         48 bits physical, 48 bits virtual
  Byte Order:            Little Endian
CPU(s):                  32
  On-line CPU(s) list:   0-31
Vendor ID:               AuthenticAMD
  Model name:            AMD Ryzen 9 5950X 16-Core Processor
    CPU family:          25
    Model:               33
    Thread(s) per core:  2
    Core(s) per socket:  16
    Socket(s):           1
    Stepping:            0
    Frequency boost:     disabled
    CPU max MHz:         6017.8462
    CPU min MHz:         2200.0000
    BogoMIPS:            8050.07
    Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse
                         3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_p
                         state ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbn
                         oinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm
Virtualization features:
  Virtualization:        AMD-V
Caches (sum of all):
  L1d:                   512 KiB (16 instances)
  L1i:                   512 KiB (16 instances)
  L2:                    8 MiB (16 instances)
  L3:                    64 MiB (2 instances)
NUMA:
  NUMA node(s):          1
  NUMA node0 CPU(s):     0-31
Vulnerabilities:
  Itlb multihit:         Not affected
  L1tf:                  Not affected
  Mds:                   Not affected
  Meltdown:              Not affected
  Spec store bypass:     Mitigation; Speculative Store Bypass disabled via prctl
  Spectre v1:            Mitigation; usercopy/swapgs barriers and __user pointer sanitization
  Spectre v2:            Mitigation; Retpolines, IBPB conditional, IBRS_FW, STIBP always-on, RSB filling
  Srbds:                 Not affected
  Tsx async abort:       Not affected
```

Model is 33 (0x21), while the code was expecting it to be `0x00 .. 0x1F`.
https://github.com/torvalds/linux/blob/v5.17-rc8/drivers/hwmon/k10temp.c#L432-L453 agrees.
I'm not sure if other ranges listed here should also be accepted.

I noticed this while implementing CPU model detection
for halide (https://github.com/halide/Halide/pull/6648)

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D121708
2022-03-15 20:28:02 +03:00
Ties Stuij
352453569b [AARCH64] ssbs should be enabled by default for cortex-x1, cortex-x1c, cortex-a77
Reviewed By: amilendra

Differential Revision: https://reviews.llvm.org/D121206
2022-03-15 13:44:20 +00:00
Ben Barham
cc63ae42d7 [VFS] Rename RedirectingFileSystem::dump to print
The rest of LLVM uses `print` for the method taking the `raw_ostream`
and `dump` only for the method with no parameters. Use the same for
`RedirectingFileSystem`.

Differential Revision: https://reviews.llvm.org/D121494
2022-03-14 11:44:07 -07:00
Fangrui Song
407c721ceb [Support] Change zlib::compress to return void
With a sufficiently large output buffer, the only failure is Z_MEM_ERROR.
Check it and call the noreturn report_bad_alloc_error if applicable.
resize_for_overwrite may call report_bad_alloc_error as well.

Now that there is no other error type, we can replace the return type with void
and simplify call sites.

Reviewed By: ikudrin

Differential Revision: https://reviews.llvm.org/D121512
2022-03-14 11:38:04 -07:00
serge-sans-paille
f6484bd3b0 Fix issing header on z/OS
Bug introduced in fbbc41f8dd23
2022-03-14 17:29:08 +01:00
Aaron Ballman
8cba72177d Implement literal suffixes for _BitInt
WG14 adopted N2775 (http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2775.pdf)
at our Feb 2022 meeting. This paper adds a literal suffix for
bit-precise types that automatically sizes the bit-precise type to be
the smallest possible legal _BitInt type that can represent the literal
value. The suffix chosen is wb (for a signed bit-precise type) which
can be combined with the u suffix (for an unsigned bit-precise type).

The preprocessor continues to operate as-if all integer types were
intmax_t/uintmax_t, including bit-precise integer types. It is a
constraint violation if the bit-precise literal is too large to fit
within that type in the context of the preprocessor (when still using
a pp-number preprocessing token), but it is not a constraint violation
in other circumstances. This allows you to make bit-precise integer
literals that are wider than what the preprocessor currently supports
in order to initialize variables, etc.
2022-03-14 09:24:19 -04:00
Fangrui Song
bd0bddc1ea [CommandLine] Remove may only occur zero or one times! error
Early adoption of new technologies or adjusting certain code generation/IR optimization thresholds
is often available through some cl::opt options (which have unstable surfaces).
Specifying such an option twice will lead to an error.

```
% clang -c a.c -mllvm -disable-binop-extract-shuffle -mllvm -disable-binop-extract-shuffle
clang (LLVM option parsing): for the --disable-binop-extract-shuffle option: may only occur zero or one times!
% clang -c a.c -mllvm -hwasan-instrument-reads=0 -mllvm -hwasan-instrument-reads=0
clang (LLVM option parsing): for the --hwasan-instrument-reads option: may only occur zero or one times!
% clang -c a.c -mllvm --scalar-evolution-max-arith-depth=32 -mllvm --scalar-evolution-max-arith-depth=16
clang (LLVM option parsing): for the --scalar-evolution-max-arith-depth option: may only occur zero or one times!
```

The option is specified twice, because there is sometimes a global setting and
a specific file or project may need to override (or duplicately specify) the
value.

The error is contrary to the common practice of getopt/getopt_long command line
utilities that let the last option win and the `getLastArg` behavior used by
Clang driver options. I have seen such errors for several times. I think the
error just makes users inconvenient, while providing very little value on
discouraging production usage of unstable surfaces (this goal is itself
controversial, because developers might not want to commit to a stable surface
too early, or there is just some subtle codegen toggle which is infeasible to
have a driver option). Therefore, I suggest we drop the diagnostic, at least
before the diagnostic gets sufficiently better support for the overridding needs.

Removing the error is a degraded error checking experience. I think this error
checking behavior, if desirable, should be enabled explicitly by tools. Users
preferring the behavior can figure out a way to do so.

Reviewed By: jhenderson, rnk

Differential Revision: https://reviews.llvm.org/D120455
2022-03-11 11:25:04 -08:00
Balazs Benics
60cb83d549 [analyzer] Fix include typo introduced by e61a1a9 2022-03-11 16:09:25 +01:00
serge-sans-paille
e61a1a9849 Conditional include of missing headers under Z3 2022-03-11 15:52:24 +01:00
serge-sans-paille
efec6b800f Conditional include of Twine.h under Z3 2022-03-11 15:48:06 +01:00
serge-sans-paille
fbbc41f8dd Cleanup include: TableGen
This also includes a few cleanup from Support.

Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup
Differential Revision: https://reviews.llvm.org/D121331
2022-03-11 11:41:32 +01:00
Dmitry Vassiliev
dfeb978155 Fixed a roll-over on size_t in getNewUninitMemBuffer()
Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D121399
2022-03-11 13:16:58 +04:00