5 Commits

Author SHA1 Message Date
Kazu Hirata
d8e4170b0a Ensure newlines at the end of files (NFC) 2021-10-23 08:45:29 -07:00
Zi Xuan Wu
de10a02fc0 [CSKY] Complete to add basic integer instruction set
Complete the basic integer instruction set and add related predictor in CSKY.td.
And it includes the instruction definition and asm parser support.

Differential Revision: https://reviews.llvm.org/D111701
2021-10-20 15:50:44 +08:00
Zi Xuan Wu
4bb60c285c [CSKY 6/n] Add support branch and symbol series instruction
This patch adds basic CSKY branch instructions and symbol address series instructions.
Those two kinds of instruction have relationship between each other, and it involves much work about Fixups.

For now, basic instructions are enabled except for disassembler support.
We would support to generate basic codegen asm firstly and delay disassembler work later.

Differential Revision: https://reviews.llvm.org/D95029
2021-04-20 15:36:49 +08:00
Zi Xuan Wu
4216389c26 [CSKY 5/n] Add support for all CSKY basic integer instructions except for branch series
This patch adds basic CSKY integer instructions except for branch series such as bsr, br.
It mainly includes basic ALU, load & store, compare and data move instructions.

Branch series instructions need handle complex symbol operand as following patch later.

Differential Revision: https://reviews.llvm.org/D94007
2021-04-20 15:36:49 +08:00
Zi Xuan Wu
365c405411 [CSKY 2/n] Add basic tablegen infra for CSKY
This introduce basic tablegen infra such as CSKY{InstrFormats,InstrInfo,RegisterInfo,}.td.
For now, only add instruction definitions for basic CSKY ISA operations, and the instruction format and register info are almost complete.

Our initial target is a working MC layer rather than codegen, so appropriate SelectionDAG patterns will come later.

Differential Revision: https://reviews.llvm.org/D89180
2020-12-07 11:56:09 +08:00