10 Commits

Author SHA1 Message Date
Reid Kleckner
89b57061f7 Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack.
Every client of the target registry needs to link against MC anyway to
actually use the target, so we might as well move this out of Support.

This allows us to ensure that Support doesn't have includes from MC/*.

Differential Revision: https://reviews.llvm.org/D111454
2021-10-08 14:51:48 -07:00
Kazushi (Jam) Marukawa
c287f90ccd [VE] Change default CPU name to "generic"
Change default CPU name of SX-Aurora VE from "ve" to "generic" similar
to other architectures.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93836
2021-01-04 20:09:57 +09:00
Sergei Trofimovich
1eb812e06d [VE] Fix initializer visibility
Before the change attempt to link libLTO.so against shared
LLVM library failed as:

```
[ 76%] Linking CXX shared library ../../lib/libLTO.so
... /usr/bin/cmake -E cmake_link_script CMakeFiles/LTO.dir/link.txt --verbose=1
c++ -o ...libLTO.so.12git ...ibLLVM-12git.so
ld: CMakeFiles/LTO.dir/lto.cpp.o: in function `llvm::InitializeAllTargetInfos()':
include/llvm/Config/Targets.def:31: undefined reference to `LLVMInitializeVETargetInfo'
```

It happens because on linux llvm build system sets default
symbol visibility to "hidden". The fix is to set visibility
back to "default" for exported APIs with LLVM_EXTERNAL_VISIBILITY.

Bug: https://bugs.llvm.org/show_bug.cgi?id=47847

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D89633
2020-10-19 22:54:41 +01:00
Fangrui Song
58f5966d5b Fix TargetSubtargetInfo derivatives after D85165 2020-08-14 15:50:53 -07:00
Kazushi (Jam) Marukawa
0e0907fa0e [VE] Implements minimum MC layer for VE (4/4)
Summary:
This patch includes following items.

 - Adds AsmParser and minimum AsmBackend/ELFObjectWriter/MCCodeEmitter to
   support only LEA instruction in order to reduce the size of this patch.
 - Adds regression test of MC layer for a LEA instruction.
 - Relocations are not supported this time to reduce the size of this patch.

Differential Revision: https://reviews.llvm.org/D79546
2020-05-29 10:50:16 +02:00
Fangrui Song
7e49dc6184 [MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset
The negative Offset has caused a bunch of problems and confused quite a
few call sites. Delete the unneeded negation and fix all call sites.
2020-05-22 15:47:26 -07:00
Kazushi (Jam) Marukawa
d8816261a6 [VE] Create a TargetInfo header. NFC
Summary:
Move the declarations of getThe<Name>Target() functions into a new header in
TargetInfo and make users of these functions include this new header in
order to follow other architectures.

Differential Revision: https://reviews.llvm.org/D78543
2020-04-21 11:42:17 +02:00
Kazushi (Jam) Marukawa
6bbbead7be [VE] Move VEInstPrinter.cpp and VEInstPrinter.h into MCTargetDesc
Summary:
Move them into MCTargetDesc to follow other architectures (a263aa2).

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D76270
2020-03-17 11:33:54 +01:00
Kazushi (Jam) Marukawa
064859bde7 [VE] Minimal codegen for empty functions
Summary:
This patch implements minimal VE code generation for empty function bodies (no args, no value return).

Contents

* empty function code generation test.
* Minimal function prologue & epilogue emission
* Instruction formats and instruction definitions as far as required for the empty function prologue & epilogue.
* I64 register class definitions.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D72598
2020-01-15 09:55:16 +01:00
Kazushi (Jam) Marukawa
00c6e98409 [VE] Target stub for NEC SX-Aurora
Summary:
This patch registers the 've' target: the NEC SX-Aurora TSUBASA Vector Engine.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D69103
2020-01-09 11:17:35 +01:00