4 Commits

Author	SHA1	Message	Date
Jay Foad	4db7422771	[AMDGPU] Improve zeroesHigh16BitsOfDest for GFX9 legacy opcodes ... Pseudos like V_MAD_U16 and V_FMA_F16 map down to what GFX9 calls v_mad_legacy_u16 and v_fma_legacy_f16, which are documented to have the same zeroing behaviour as on GFX8. Differential Revision: https://reviews.llvm.org/D115729	2021-12-15 13:14:48 +00:00
Jay Foad	819fb457a6	[AMDGPU] Regenerate checks in high-bits-zeroed-16-bit-ops.mir	2021-12-14 15:33:35 +00:00
Matt Arsenault	39f8a792f0	AMDGPU: Try to eliminate clearing of high bits of 16-bit instructions ... These used to consistently be zeroed pre-gfx9, but gfx9 made the situation complicated since now some still do and some don't. This also manages to pick up a few cases that the pattern fails to optimize away. We handle some cases with instruction patterns, but some get through. In particular this improves the integer cases.	2021-06-22 13:42:49 -04:00
Matt Arsenault	2e120920ac	AMDGPU: Add baseline test for instructions zeroing high bits	2021-06-22 13:27:39 -04:00