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Author	SHA1	Message	Date
David Green	351edf1c47	[ARM] Remove FeaturePerfMon from armv7-m FeaturePerfMon relates to the PMU extensions available in armv7-a, and should not be available in v7-m (it requires loading from a system register with a mrc). Sink it down a level in the dependency map so that it isn't present in ARMv7m or HasV8MMainlineOps. It is also removed from the Neoverse-N2, as it will already be transitively included. Differential Revision: https://reviews.llvm.org/D117022	2022-01-12 09:44:53 +00:00
Tim Northover	bc93308489	ARM: implement @llvm.readcyclecounter intrinsic This implements the @llvm.readcyclecounter intrinsic as the specific MRC instruction specified in the ARM manuals for CPUs with the Power Management extensions. Older CPUs had slightly different methods which may also have to be implemented eventually, but this should cover all v7 cases. rdar://problem/13939186 llvm-svn: 182603	2013-05-23 19:11:20 +00:00

Author

SHA1

Message

Date

David Green

351edf1c47

[ARM] Remove FeaturePerfMon from armv7-m

FeaturePerfMon relates to the PMU extensions available in armv7-a, and
should not be available in v7-m (it requires loading from a system
register with a mrc). Sink it down a level in the dependency map so that
it isn't present in ARMv7m or HasV8MMainlineOps.

It is also removed from the Neoverse-N2, as it will already be
transitively included.

Differential Revision: https://reviews.llvm.org/D117022

2022-01-12 09:44:53 +00:00

Tim Northover

bc93308489

ARM: implement @llvm.readcyclecounter intrinsic

This implements the @llvm.readcyclecounter intrinsic as the specific
MRC instruction specified in the ARM manuals for CPUs with the Power
Management extensions.

Older CPUs had slightly different methods which may also have to be
implemented eventually, but this should cover all v7 cases.

rdar://problem/13939186

llvm-svn: 182603

2013-05-23 19:11:20 +00:00

2 Commits