llvm-project

Author SHA1 Message Date

Author	SHA1	Message	Date
Simon Atanasyan	623282f0dd	[mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC Support for 64-bit coprocessors on a 32-bit architecture was added in `MIPS32 R2`. llvm-svn: 365507	2019-07-09 15:48:05 +00:00
Aleksandar Beserminji	3546c1603a	[mips] Fix how compiler fuse instructions to fmadd/fmsub This patch makes compiler does not fuse fmul and fadd/fsub into fmadd/fmsub by default. Instead, -fp-contract=fast option can be used when such behavior is desired. Differential Revision: https://reviews.llvm.org/D46057 llvm-svn: 331033	2018-04-27 13:30:27 +00:00

Simon Atanasyan

623282f0dd

[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC

Support for 64-bit coprocessors on a 32-bit architecture
was added in `MIPS32 R2`.

llvm-svn: 365507

2019-07-09 15:48:05 +00:00

Aleksandar Beserminji

3546c1603a

[mips] Fix how compiler fuse instructions to fmadd/fmsub

This patch makes compiler does not fuse fmul and fadd/fsub into
fmadd/fmsub by default. Instead, -fp-contract=fast option can
be used when such behavior is desired.

Differential Revision: https://reviews.llvm.org/D46057

llvm-svn: 331033

2018-04-27 13:30:27 +00:00

2 Commits